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AT28BV16-30JC Datasheet(PDF) 5 Page - ATMEL Corporation |
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AT28BV16-30JC Datasheet(HTML) 5 Page - ATMEL Corporation |
5 / 8 page Notes: 1. CE may be delayed up to tACC - tCE after the address transition without impact on tACC. 2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE or by tACC - tOE after an address change without impact on tACC. 3. tDF is specified from OE or CE whichever occurs first (CL = 5 pF). 4. This parameter is characterized and is not 100% tested. AC Read Waveforms (1, 2, 3, 4) tR, tF < 20 ns Input Test Waveforms and Measurement Level Output Test Load Typ Max Units Conditions CIN 46 pF VIN = 0V COUT 812 pF VOUT = 0V Pin Capacitance (f = 1 MHz, T = 25°C) (1) Note: 1. This parameter is characterized and is not 100% tested. AT28BV16-25 AT28BV16-30 Symbol Parameter Min Max Min Max Units tACC Address to Output Delay 250 300 ns tCE (1) CE to Output Delay 250 300 ns tOE (2) OE to Output Delay 100 100 ns tDF (3, 4) CE or OE High to Output Float 0 55 0 55 ns tOH Output Hold from OE, CE or Address, whichever occurred first 00 ns AC Read Characteristics AT28BV16 2-123 |
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