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LP3879MR-1.0 Datasheet(PDF) 3 Page - Texas Instruments |
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LP3879MR-1.0 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 18 page using: The value of θJ−A for the WSON and SO PowerPad packages are specifically dependent on PCB trace area, LP3879 www.ti.com SNVS396B – MAY 2006 – REVISED APRIL 2013 Absolute Maximum Ratings (1) (2) Storage Temperature Range −65°C to +150°C Operating Junction Temperature Range -40°C to +125°C Lead Temperature (Soldering, 5 seconds) 260°C ESD Rating(3) 2 kV Shutdown Pin 1kV Power Dissipation(4) Internally Limited Input Supply Voltage (Survival) −0.3V to +16V Input Supply Voltage (Typical Operating) 2.5V to +6V SENSE Pin −0.3V to +6V Output Voltage (Survival)(5) −0.3V to +6V IOUT (Survival) Short Circuit Protected Input-Output Voltage (Survival)(6) −0.3V to +16V (1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the device outside of its rated operating conditions. (2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. (3) ESD testing was performed using Human Body Model, a 100 pF capacitor discharged through a 1.5 k Ω resistor. (4) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJ−A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated trace material, and the number of layers and thermal vias. If a four layer board is used with maximum vias from the IC center to the heat dissipating copper layers, values of θJ−A which can be obtained are approximately 60°C/W for the SO PowerPad and 40°C/W for the WSON package. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. (5) If used in a dual-supply system where the regulator load is returned to a negative supply, the LP3879 output must be diode-clamped to ground. (6) The output PNP structure contains a diode between the VIN and VOUT terminals that is normally reverse-biased. Forcing the output above the input will turn on this diode and may induce a latch-up mode which can damage the part (see Application Hints). Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LP3879 |
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