AT49F004(T)/4096A(T)

4

device is in its standard operating mode. A low level on the

RESET input halts the present device operation and puts

the outputs of the device in a high impedance state. When

a high level is reasserted on the RESET pin, the device

returns to the Read or Standby mode, depending upon the

state of the control inputs. By applying a 12V

± 0.5V input

signal to the RESET pin the boot block array can be repro-

grammed even if the boot block program lockout feature

has been enabled (see Boot Block Programming Lockout

Override section).

ERASURE: Before a byte or word can be reprogrammed, it

must be erased. The erased state of memory bits is a logi-

cal “1”. The entire device can be erased by using the Chip

Erase command or individual sectors can be erased by

using the Sector Erase commands.

CHIP ERASE: The entire device can be erased at one time

by using the 6-byte chip erase software code. After the chip

erase has been initiated, the device will internally time the

erase operation so that no external clocks are required.

The maximum time to erase the chip is t

If the boot block lockout has been enabled, the Chip Erase

will not erase the data in the boot block; it will erase the

main memory block and the parameter blocks only. After

the chip erase, the device will return to the read or standby

mode.

SECTOR ERASE: As an alternative to a full chip erase, the

device is organized into four sectors that can be individually

erased. There are two 4K word parameter block sections,

one boot block, and the main memory array block. The

Sector Erase command is a six bus cycle operation. The

sector address is latched on the falling WE edge of the

sixth cycle while the 30H data input command is latched at

the rising edge of WE. The sector erase starts after the ris-

ing edge of WE of the sixth cycle. The erase operation is

internally controlled; it will automatically time to completion.

Whenever the main memory block is erased and repro-

grammed, the two parameter blocks should be erased and

reprogrammed before the main memory block is erased

again. Whenever a parameter block is erased and repro-

grammed, the other parameter block should be erased and

reprogrammed before the first parameter block is erased

again. Whenever the boot block is erased and repro-

grammed, the main memory block and the parameter

blocks should be erased and reprogrammed before the

boot block is erased again.

BYTE/WORD PROGRAMMING: Once a memory block is

erased, it is programmed (to a logical “0”) on a byte-by-byte

or word-by-word basis. Programming is accomplished via

the internal device command register and is a 4 bus cycle

operation. The device will automatically generate the

required internal program pulses.

Any commands written to the chip during the embedded

programming cycle will be ignored. If a hardware reset hap-

pens during programming, the data at the location being

programmed will be corrupted. Please note that a data “0”

cannot be programmed back to a “1”; only erase operations

can convert “0”s to “1”s. Programming is completed after

also be used to indicate the end of a program cycle.

BOOT BLOCK PROGRAMMING LOCKOUT: The device

has one designated block that has a programming lockout

feature. This feature prevents programming of data in the

designated block once the feature has been enabled. The

size of the block is 8K words. This block, referred to as the

boot block, can contain secure code that is used to bring up

the system. Enabling the lockout feature will allow the boot

code to stay in the device while data in the rest of the

device is updated. This feature does not have to be acti-

vated; the boot block’s usage as a write protected region is

optional to the user. The address range of the boot block is

00000H to 03FFFH for the AT49F004; 7C000H to 7FFFFH

f o r t he AT4 9 F 004 T; 00 000 H to 01F F F H f o r the

AT 49F 40 96A; an d 3 E 000H t o 3F FF F H for the

AT49F4096AT.

Once the feature is enabled, the data in the boot block can

no longer be erased or programmed when input levels of

5.5V or less are used. Data in the main memory block can

still be changed through the regular programming method.

To activate the lockout feature, a series of six program

commands to specific addresses with specific data must be

performed. Please refer to the Command Definitions table.

BOOT BLOCK LOCKOUT DETECTION: A software

method is available to determine if programming of the boot

block section is locked out. When the device is in the soft-

ware product identification mode (see Software Product

Identification Entry and Exit sections) a read from the fol-

lowing address location will show if programming the boot

bl ock is l o cked ou t—0 000 2H fo r AT 49F 00 4 a n d

AT49F4096A; 7C002 for the AT49F004T; and 3E002H for

the AT49F4096AT. If the data on I/O0 is low, the boot block

can be programmed; if the data on I/O0 is high, the pro-

gram lockout feature has been enabled and the block can-

not be programmed. The software product identification

exit code should be used to return to standard operation.

BOOT BLOCK PROGRAMMING LOCKOUT OVERRIDE:

The user can override the boot block programming lockout

by taking the RESET pin to 12 volts during the entire chip

erase, sector erase or word programming operation. When

the RESET pin is brought back to TTL levels the boot block

programming lockout feature is again active.

PRODUCT IDENTIFICATION: The product identification

mode identifies the device and manufacturer as Atmel. It

may be accessed by hardware or software operation. The

hardware operation mode can be used by an external pro-

grammer to identify the correct programming algorithm for

the Atmel product.