AT89C1051U

7

Notes:

1. The internal PEROM address counter is reset to 000H on the rising edge of RST and is advanced by a positive pulse at

XTAL1 pin.

2. Chip Erase requires a 10-ms PROG pulse.

3. P3.1 is pulled Low during programming to indicate RDY/BSY.

Figure 3. Programming the Flash Memory

Figure 4. Verifying the Flash Memory

Flash Programming Modes

Mode

RST/VPP

P3.2/PROG

P3.3

P3.4

P3.5

P3.7

12V

L

H

H

H

HH

L

L

H

H

Write Lock

Bit - 1

12V

H

H

H

H

Bit - 2

12V

H

H

L

L

Chip Erase

12V

H

L

L

L

Read Signature Byte

H

H

L

L

L

L

(2)

PP

AT89C1051U

AT89C1051U