© Semiconductor Components Industries, LLC, 2012

April, 2012 − Rev. 2

1

Publication Order Number:

ESD7104/D

ESD7104

Transient Voltage

Suppressors

Low Capacitance ESD Protection for

High Speed Data

The ESD7104 transient voltage suppressor is designed to protect

high speed data lines from ESD. Ultra−low capacitance and low ESD

clamping voltage make this device an ideal solution for protecting

voltage sensitive high speed data lines. The flow−through style

package allows for easy PCB layout and matched trace lengths

necessary to maintain consistent impedance between high speed

differential lines such as USB 3.0 and HDMI.

Features

IEC 61000−4−2 (Level 4)

Typical Applications

Rating

Symbol

Value

Unit

Operating Junction Temperature Range

−55 to +125

°C

Storage Temperature Range

−55 to +150

°C

Lead Solder Temperature −

Maximum (10 Seconds)

260

°C

IEC 61000−4−2 Contact (ESD)

IEC 61000−4−2 Air (ESD)

ESD

ESD

±15

±15

kV

kV

Stresses exceeding Maximum Ratings may damage the device. Maximum

Ratings are stress ratings only. Functional operation above the Recommended

Operating Conditions is not implied. Extended exposure to stresses above the

Recommended Operating Conditions may affect device reliability.

See Application Note AND8308/D for further description of

survivability specs.

MARKING

DIAGRAM

Device

Package

Shipping

ORDERING INFORMATION

UDFN10

CASE 517BB

PIN CONFIGURATION

AND SCHEMATIC

http://onsemi.com

ESD7104MUTAG

UDFN10

(Pb−Free)

3000 / Tape & Reel

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

7M MG

G

7M

= Specific Device Code (tbd)

M

= Date Code

G

= Pb−Free Package

I/O

I/O

I/O

I/O GND

N/C N/C

N/C N/C

GND

14

5

23

10

7

6

98

(Note: Microdot may be in either location)

GND

Pin 2

Pin 4 Pin 5

Pin 1

=

I/O

I/O

I/O

I/O

Pin 3