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NVMFD5877NLT3G Datasheet(PDF) 1 Page - ON Semiconductor |
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NVMFD5877NLT3G Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 6 page © Semiconductor Components Industries, LLC, 2013 November, 2013 − Rev. 8 1 Publication Order Number: NVMFD5877NL/D NVMFD5877NL, NVMFD5877NLWF Power MOSFET 60 V, 39 mW, 17 A, Dual N−Channel, Logic Level, Dual SO8FL Features • Low RDS(on) to Minimize Conduction Losses • Low Capacitance to Minimize Driver Losses • NVMFD5877NLWF − Wettable Flanks Product • AEC−Q101 Qualified and PPAP Capable • These Devices are Pb−Free, Halogen Free and are RoHS Compliant MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS 60 V Gate−to−Source Voltage VGS "20 V Continuous Drain Cur- rent RYJ−mb (Notes 1, 2, 3, 4) Steady State Tmb = 25°C ID 17 A Tmb = 100°C 12 Power Dissipation RYJ−mb (Notes 1, 2, 3) Tmb = 25°C PD 23 W Tmb = 100°C 12 Continuous Drain Cur- rent RqJA (Notes 1 & 3, 4) Steady State TA = 25°C ID 6 A TA = 100°C 5 Power Dissipation RqJA (Notes 1, 3) TA = 25°C PD 3.2 W TA = 100°C 1.6 Pulsed Drain Current TA = 25°C, tp = 10 ms IDM 74 A Operating Junction and Storage Temperature TJ, Tstg −55 to +175 °C Source Current (Body Diode) IS 19 A Single Pulse Drain− to−Source Avalanche Energy (TJ = 25°C, VDD = 24 V, VGS = 10 V, RG = 25 W) (IL(pk) = 14.5 A, L = 0.1 mH) EAS 10.5 mJ (IL(pk) = 6.3 A, L = 2 mH) 40 Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. THERMAL RESISTANCE MAXIMUM RATINGS (Note 1) Parameter Symbol Value Unit Junction−to−Mounting Board (top) − Steady State (Note 2, 3) RYJ−mb 6.5 °C/W Junction−to−Ambient − Steady State (Note 3) RqJA 47 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Psi (Y) is used as required per JESD51−12 for packages in which substantially less than 100% of the heat flows to single case surface. 3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 4. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. ORDERING INFORMATION http://onsemi.com Device Package Shipping† V(BR)DSS RDS(on) MAX ID MAX 60 V 39 mW @ 10 V 17 A †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. DFN8 5x6 (SO8FL) CASE 506BT MARKING DIAGRAM 60 mW @ 4.5 V NVMFD5877NLT1G DFN8 (Pb−Free) 1500 / Tape & Reel NVMFD5877NLT3G DFN8 (Pb−Free) 5000 / Tape & Reel D1 D1 D2 D2 S1 G1 S2 G2 Dual N−Channel D1 S1 G1 5877xx AYWZZ D2 D1 D2 S2 G2 D2 D1 1 NVMFD5877NLWFT1G DFN8 (Pb−Free) 1500 / Tape & Reel NVMFD5877NLWFT3G DFN8 (Pb−Free) 5000 / Tape & Reel 5877NL = Specific Device Code for NVMFD5877NL 5877LW = Specific Device Code for NVMFD5877NLWF A = Assembly Location Y = Year W = Work Week ZZ = Lot Traceability |
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