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25LC040XT Datasheet(PDF) 9 Page - Microchip Technology |
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25LC040XT Datasheet(HTML) 9 Page - Microchip Technology |
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9 / 22 page  © 2006 Microchip Technology Inc. DS21204E-page 9 25AA040/25LC040/25C040 3.4 Write Enable (WREN) and Write Disable (WRDI) The 25XX040 contains a write enable latch. See Table 3-3 for the Write-Protect Functionality Matrix. This latch must be set before any write operation will be completed internally. The WREN instruction will set the latch, and the WRDI will reset the latch. The following is a list of conditions under which the write enable latch will be reset: • Power-up • WRDI instruction successfully executed • WRSR instruction successfully executed • WRITE instruction successfully executed •WP line is low FIGURE 3-4: WRITE ENABLE SEQUENCE FIGURE 3-5: WRITE DISABLE SEQUENCE SCK 0 234567 1 SI High-impedance SO CS 01 0000 0 1 SCK 0 234567 1 SI High-impedance SO CS 01 0000 0 10 |
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