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ATV750L-25LM Datasheet(PDF) 1 Page - ATMEL Corporation |
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ATV750L-25LM Datasheet(HTML) 1 Page - ATMEL Corporation |
1 / 14 page 1 Features • Third Generation Programmable Logic Structure – High-Density Replacement for Discrete Logic • High-Speed — Plus a New, Low-Power Version • Increased Logic Flexibility – 42 Inputs and 20 Sum Terms • Flexible Output Logic – 20 Flip-Flops - 10 Extra – All Can Be Individually Buried or 10 Output Directly – Each has Individual Asynchronous Reset and Clock Terms • Multiple Feedback Paths Provide for Buried State Machines and I/O Bus Compatibility • Proven and Reliable High-Speed CMOS EPROM Process – 2000V ESD Protection – 200 mA Latchup Immunity • Reprogrammable – Tested 100% for Programmability • 24-pin, 300-mil Dual-In-line and 28-Lead Surface Mount Packages Logic Diagram Description The ATV750(L) is 100% more powerful than most other programmable logic devices in 24-pin packages. Increased product terms, sum terms, and flip-flops translate into more usable gates. Each of the ATV750(L)’s twenty-two logic pins can be used as an input. Ten of these can be used as input, output, or bi-directional I/O pins. All twenty flip-flops can be fed back into the array independently. This flexibility allows burying all of the sum terms and flip-flops. There are 171 product terms available. A variable format is used to assign between four and eight product terms per sum term. There are two sum terms per output, pro- viding added flexibility. Rev. 0024E–05/98 Pin Configurations Pin Name Function IN Logic Inputs I/O Bidirectional Buffers * No Internal Connection VCC +5V Supply (continued) High Density UV Erasable Programmable Logic Device ATV750 ATV750L DIP/SOIC 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 IN IN IN IN IN IN IN IN IN IN IN GND VCC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O IN PLCC/LCC (Top View) 5 6 7 8 9 10 11 25 24 23 22 21 20 19 IN IN IN * IN IN IN I/O I/O I/O * I/O I/O I/O |
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