CY62256N

Document Number: 001-06511 Rev. *F

Page 3 of 16

Pin Configurations

Figure 1. 28-pin DIP and Narrow SOIC

Figure 2. 28-pin TSOP I and Reverse TSOP I

Product Portfolio

Product

Speed

(ns)

Power Dissipation

(mA)

Min

Typ[1]

Max

Typ[1]

Max

Typ[1]

Max

CY62256NLL

Commercial

4.5

5.0

5.5

70

25

50

0.1

5

CY62256NLL

Industrial

55/70

25

50

0.1

10

CY62256NLL

Automotive-A

55/70

25

50

0.1

10

CY62256NLL

Automotive-E

55

25

50

0.1

15

Table 1. Pin Definitions

Pin Number

Type

Description

1–10, 21, 23–26

Input

11–13, 15–19,

Input/Output

27

Input/Control

WE. When selected LOW, a WRITE is conducted. When selected HIGH, a READ is

conducted

20

Input/Control

CE. When LOW, selects the chip. When HIGH, deselects the chip

22

Input/Control

OE. Output Enable. Controls the direction of the I/O pins. When LOW, the I/O pins

behave as outputs. When deasserted HIGH, I/O pins are tristated, and act as input

data pins

14

Ground

GND. Ground for the device

28

Power Supply

Note

1. Typical specifications are the mean values measured over a large sample size across normal production process variations and are taken at nominal conditions