UCC2817, UCC2818, UCC3817, UCC3818

BiCMOS POWER FACTOR PREREGULATOR

SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009

11

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APPLICATION INFORMATION

multiplier (continued)

R

MOUT +

V

RSENSE

I

MOUT(max)

roughly 3.91 k

Ω.

voltage loop

The second major source of harmonic distortion is the ripple on the output capacitor at the second harmonic

of the line frequency. This ripple is fed back through the error amplifier and appears as a 3rd harmonic ripple

at the input to the multiplier. The voltage loop must be compensated not just for stability but also to attenuate

the contribution of this ripple to the total harmonic distortion of the system. (refer to Figure 2).

RIN

RD

+

−

Rf

Cf

VREF

VOUT

CZ

Figure 2. Voltage Amplifier Configuration

the output capacitor. The peak value of the second harmonic voltage is given by the equation:

V

OPK +

P

IN

2

p

f

R

C

OUT

V

OUT

the voltage loop to the total harmonic distortion budget we set the gain equal to:

G

VA +

DV

VAOUT

(0.015)

2

V

OPK

where

back to the voltage amplifier for output voltage regulation. In this case the value was chosen to be 1 M

Ω. This

high value was chosen to reduce power dissipation in the resistor. In practice, the resistor value would be

realized by the use of two 500-k

Ω resistors in series because of the voltage rating constraints of most standard