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BQ24261YFFT Datasheet(PDF) 6 Page - Texas Instruments |
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BQ24261YFFT Datasheet(HTML) 6 Page - Texas Instruments |
6 / 46 page bq24260 bq24261 bq24262A SLUSBU4A – DECEMBER 2013 – REVISED JANUARY 2014 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Circuit of Figure 1, VUVLO < VIN < VOVP AND VIN > VBAT+ VSLP, TJ = –40°C to 125°C and TJ = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Deglitch for CD and PSEL CD or PSEL rising/falling 100 µs PROTECTION VUVLO IC active threshold voltage VIN rising 3.2 3.3 3.4 V VUVLO_HYS IC active hysteresis VIN falling from above VUVLO 300 mV Battery Undervoltage VBATUVLO VBAT falling, 100mV Hysteresis 2.4 2.6 V Lockout threshold Sleep-mode entry threshold, VSLP 2.0 V < VBAT < VBATREG, VIN falling 0 40 120 mV VIN-VBAT Deglitch time, BAT above tDGL(BAT) VBATUVLO before SYS starts 1.2 ms to rise VSLP_HYS Sleep-mode exit hysteresis VIN rising above VSLP 40 100 190 mV Deglitch time for supply tDGL(VSLP) Rising voltage, 2-mV over drive, tRISE=100ns 30 ms rising above VSLP+VSLP_HYS bq24260 10.1 10.5 10.9 Input supply OVP threshold VOVP IN rising, 100mV hysteresis bq24261 13.6 14 14.4 V voltage bq24262 6.25 6.5 6.75 Good Battery Monitor VBATGD VIN Rising 3.51 3.7 3.89 V Threshold (BQ24260/1 only) tDGL(BUCK_OV Deglitch time, VIN OVP in IN falling below VOVP 30 ms P) Buck Mode 1.03 × 1.05 × 1.07 × Battery OVP threshold VBOVP VBAT threshold over VOREG to turn off charger during charge V voltage VBATREG VBATREG VBATREG % of VBOVP_HYS VBOVP hysteresis Lower limit for VBAT falling from above VBOVP 1 VBATREG tDGL(BOVP) BOVP Deglitch Battery entering/exiting BOVP 8 ms ICbCLIMIT Cycle-by-cycle current limit VSYS shorted 4.1 4.5 4.9 A TSHTDWN Thermal trip 150 °C Thermal hysteresis 10 TREG Thermal regulation threshold Input current begins to cut off 125 °C Safety Timer Accuracy –20% 20% PWM YFF Package: Measured from IN to SW 75 120 m Ω Internal top MOSFET on- RDSON_Q1 resistance RGE Package: Measured from IN to SW 80 135 m Ω YFF Package: Measured from SW to PGND 75 115 m Ω Internal bottom N-channel RDSON_Q2 MOSFET on-resistance RGE Package: Measured from SW to PGND 80 135 m Ω fOSC Oscillator frequency 1.35 1.5 1.65 MHz DMAX Maximum duty cycle 95 % DMIN Minimum duty cycle 0 BATTERY-PACK NTC MONITOR (1) VHOT High temperature threshold VTS falling, 2% VDRV Hysteresis 27.3 30 32.6 %VDRV VWARM Warm temperature threshold VTS falling, 2% VDRV Hysteresis 36.0 38.3 41.2 %VDRV VCOOL Cool temperature threshold VTS rising, 2% VDRV Hysteresis 54.7 56.4 58.1 %VDRV VCOLD Low temperature threshold VTS rising, 2% VDRV Hysteresis 58.2 60 61.8 %VDRV TSOFF TS Disable threshold VTS rising, 4% VDRV Hysteresis 80 85 %VDRV tDGL(TS) Deglitch time on TS change Applies to VHOT, VWARM, VCOOL and VCOLD 50 ms I2C COMPATIBLE INTERFACE VIH Input low threshold level VPULL-UP=1.8V, SDA and SCL 1.3 V VIL Input low threshold level VPULL-UP=1.8V, SDA and SCL 0.4 V VOL Output low threshold level IL=5mA, sink current 0.4 V IBIAS High-Level leakage current VPULL-UP=1.8V, SDA and SCL 1 μA tWATCHDOG 30 50 s 6 Submit Documentation Feedback Copyright © 2013–2014, Texas Instruments Incorporated Product Folder Links: bq24260 bq24261 bq24262A |
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