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ATM0430D5-T Datasheet(PDF) 11 Page - AZ Displays |
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ATM0430D5-T Datasheet(HTML) 11 Page - AZ Displays |
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11 / 25 page  3.5. Timing Characteristics 3.5.1. Timing Conditions Parallel DE mode RGB input timing table Value Parameter Symbol Min. Typ. Max. Unit CLK frequency fclk 7 9 12 MHz DEV period time Tv 277 288 400 H DEV display area Tvd 272 H DEV blanking Tvb 5 16 128 H DEH period time Th 520 525 800 CLK DEH display area Thd 480 CLK DEH blanking Thb 40 45 320 CLK CLK cycle time Tclk 83 110 143 ns Clock width of high level Tcwh 40 50 60 % Clock width of low level Tcwl 40 50 60 % Clock rising time trck - 9 ns Clock falling time tfck - 9 ns Data Setup Time tdesu 10 - - ns Data Hold Time tdahd 10 - - ns DE Setup Time tdesu 10 - - ns DE Hold Time tdehd 10 - - ns ATM0430D5-T(AZ DISPLAYS) TFT MODUL VER1.0 AZ DISPLAYS 11 |
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