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GAL16V8D-30LD Datasheet(PDF) 5 Page - Lattice Semiconductor

Part # GAL16V8D-30LD
Description  High Performance E2CMOS PLD Generic Array Logic?
Download  8 Pages
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Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

GAL16V8D-30LD Datasheet(HTML) 5 Page - Lattice Semiconductor

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Specifications GAL16V8D/883
5
Capacitance (T
A = 25°C, f = 1.0 MHz)
SYMBOL
PARAMETER
MAXIMUM*
UNITS
TEST CONDITIONS
C
I
Input Capacitance
10
pF
V
CC = 5.0V, VI = 2.0V
C
I/O
I/O Capacitance
10
pF
V
CC = 5.0V, VI/O = 2.0V
*Characterized but not 100% tested.
tpd
A
Input or I/O to Combinational Output
3
15
3
20
3
30
ns
tco
A
Clock to Output Delay
2
12
2
15
2
20
ns
tcf2
Clock to Feedback Delay
12
15
20
ns
tsu
Setup Time, Input or Feedback before Clock↑
12
15
25
ns
th
Hold Time, Input or Feedback after Clock↑
0—
0—
0
ns
A
Maximum Clock Frequency with
41.6
33.3
22.2
MHz
External Feedback, 1/(tsu + tco)
fmax3
A
Maximum Clock Frequency with
41.6
33.3
22.2
MHz
Internal Feedback, 1/(tsu + tcf)
A
Maximum Clock Frequency with
50
41.6
33.3
MHz
No Feedback
twh
Clock Pulse Duration, High
10
12
15
ns
twl
Clock Pulse Duration, Low
10
12
15
ns
ten
B
Input or I/O to Output Enabled
15
20
30
ns
B
OE to Output Enabled
15
18
25
ns
tdis
C
Input or I/O to Output Disabled
15
20
30
ns
C
OE to Output Disabled
15
18
25
ns
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Descriptions section.
3) Refer to fmax Descriptions section.
-20
MIN. MAX.
-15
MIN. MAX.
PARAMETER
UNITS
DESCRIPTION
TEST
COND1.
-30
MIN. MAX.
AC Switching Characteristics
Over Recommended Operating Conditions


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