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ADS7809U Datasheet(PDF) 3 Page - Burr-Brown (TI) |
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ADS7809U Datasheet(HTML) 3 Page - Burr-Brown (TI) |
3 / 10 page ® ADS7809 3 SPECIFICATIONS (CONT) ELECTRICAL At TA = –40°C to +85°C, fS = 100kHz, VDIG = VANA = +5V, using internal reference and fixed resistors as shown in Figure 4, unless otherwise specified. ADS7809P, U ADS7809PB, UB PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS DIGITAL OUTPUTS Data Format Serial 16 bits Data Co Binary Two’s Complement or Straight Binary Pipeline Delay Conversion results only available after completed conversion. Data Clock Selectable for internal or external data clock Internal EXT/INT LOW 2.3 T MHz (Output Only When Transmitting Data) External EXT/INT HIGH 0.1 10 TT MHz (Can Run Continually) VOL ISINK = 1.6mA +0.4 T V VOH ISOURCE = 500µA+4 T V Leakage Current High-Z State, ±5 T µA VOUT = 0V to VDIG Output Capacitance High-Z State 15 T pF POWER SUPPLIES Specified Performance VDIG Must be ≤ V ANA +4.75 +5 +5.25 TT T V VANA +4.75 +5 +5.25 TT T V IDIG 0.3 T mA IANA 16 T mA Power Dissipation: PWRD LOW VANA = VDIG = 5V, fS = 100kHz 100 T mW PWRD HIGH 50 T µW TEMPERATURE RANGE Specified Performance –40 +85 TT °C Derated Performance –55 +125 TT °C Storage –65 +150 TT °C Thermal Resistance ( θ JA) Plastic DIP 75 T °C/W SOIC 75 T °C/W TSame as specification for ADS7809P, U. NOTES: (1) LSB means Least Significant Bit. For the ±10V input range, one LSB is 305µV. (2) Typical rms noise at worst case transitions and temperatures. (3) As measured with fixed resistors shown in Figure 4. Adjustable to zero with external potentiometer. (4) For bipolar input ranges, full scale error is the worst case of –Full Scale or +Full Scale untrimmed deviation from ideal first and last code transitions, divided by the transition voltage (not divided by the full-scale range) and includes the effect of offset error. For unipolar input ranges, full scale error is the deviation of the last code transition divided by the transition voltage. It also includes the effect of offset error. (5) All specifications in dB are referred to a full-scale ±10V input. (6) Full-Power Bandwidth defined as Full-Scale input frequency at which Signal-to-(Noise+Distortion) degrades to 60dB. (7) Recovers to specified performance after 2 x FS input overvoltage. Analog Inputs: R1IN .......................................................................... ±25V R2IN .......................................................................... ±25V R3IN .......................................................................... ±25V CAP ..................................... VANA+0.3V to AGND2 –0.3V REF ....................................... Indefinite Short to AGND2, ......................................................................... Momentary Short to VANA Ground Voltage Differences: DGND, AGND2 ................................. ±0.3V VANA ...................................................................................................... 7V VDIG to VANA ....................................................................................... +0.3 VDIG ....................................................................................................... 7V Digital Inputs ............................................................. –0.3V to VDIG +0.3V Maximum Junction Temperature .................................................. +165 °C Internal Power Dissipation ............................................................ 700mW Lead Temperature (soldering, 10s) .............................................. +300 °C ABSOLUTE MAXIMUM RATINGS GUARANTEED MINIMUM MAXIMUM NO MISSING SIGNAL-TO- SPECIFICATION PACKAGE LINEARITY CODE LEVEL (NOISE + DISTORTION) TEMPERATURE DRAWING PRODUCT ERROR (LSB) (LSB) RATIO (dB) RANGE ( °C) PACKAGE NUMBER(1) ADS7809P ±3 15 83 –40 to +85 20-Pin Plastic DIP 222 ADS7809PB ±2 16 86 –40 to +85 20-Pin Plastic DIP 222 ADS7809U ±3 15 83 –40 to +85 20-Lead SOIC 221 ADS7809UB ±2 16 86 –40 to +85 20-Lead SOIC 221 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. PACKAGE/ORDERING INFORMATION ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degrada- tion to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. |
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