10

®

AFE1203

LAYOUT

The analog front end of an HDSL system has a number of

conflicting requirements. It must accept and deliver digital

outputs at fairly high rates of speed, phase-lock to a high-

speed digital clock, and convert the line input to a high-

precision (14-bit) digital output. Thus, there are really three

sections of the AFE1203: the digital section, the phase-

locked loop, and the analog section. A combined analog and

digital ground plane is recommended. The ground plane

should pass under all of the AFE1203 and its pins.

The power supply for the digital section of the AFE1203 can

range from 3.3V to 5V. This supply should be decoupled to

ground with a ceramic 0.1

µF capacitor placed as close to

a digital power supply plane and a ground plane should run

up to and underneath the digital pins of the AFE1203 (pins

printed circuit board (PCB) trace. A ground plane under-

neath all digital pins is strongly recommended.

The Phase Locked Loop (PLL) analog supply, pin 2, must be

supply to the PLL must be in the range of 4.75V to 5.25V.

The PLL section of the AFE1203 should be decoupled with

both a 10

µF tantalum capacitor and a 0.1µF ceramic capaci-

tor. Both capacitors should be placed between pins 1 and 2.

The ceramic capacitor should be placed as close to the

AFE1203 as possible. The placement of the tantalum capaci-

tor is not as critical, but should be close. A 5

Ω to 10Ω

resistor should be used to connect the PLL supply (pin 2) to

the analog supply. This resistor, in combination with the

10

µF tantalum capacitor, form a low pass filter to keep

from affecting the PLL supply. The PLL ground (pin 1)

should connect directly to the ground plane. The ground

(pins 47 and 48, respectively).

The remaining portion of the AFE1203 should be considered

analog. All AGND pins should be connected directly to the

nected to an analog 5V power plane. Both of these planes

should have a low impedance path to the power supply.

Ideally, all ground planes and traces and all power planes

and traces should return to the power supply connector

before being connected together (if necessary). Each ground

and power trace pair should be routed over each other,

should not overlap any portion of another pair, and the pairs

should be separated by a distance of at least 0.25 inch

(6mm).