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DAC8043 Datasheet(PDF) 6 Page - Burr-Brown (TI) |
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DAC8043 Datasheet(HTML) 6 Page - Burr-Brown (TI) |
6 / 7 page 6 ® DAC8043 DISCUSSION OF SPECIFICATIONS RELATIVE ACCURACY This term, also known as end point linearity or integral linearity, describes the transfer function of analog output to digital input code. Relative accuracy describes the deviation from a straight line, after zero and full scale errors have been adjusted to zero. DIFFERENTIAL NONLINEARITY Differential nonlinearity is the deviation from an ideal 1LSB change in the output when the input code changes by 1LSB. A differential nonlinearity specification of 1LSB maximum guarantees monotonicity. GAIN ERROR Gain error is the difference between the full-scale DAC output and the ideal value. The ideal full scale output value for the DAC8043 is –(4095/4096)VREF. Gain error may be adjusted to zero using external trims as shown in Figure 4. OUTPUT LEAKAGE CURRENT The current which appears at I OUT with the DAC loaded with all zeros. OUTPUT CAPACITANCE The parasitic capacitance measured from I OUT to GND. FEEDTHROUGH ERROR The AC output error due to capacitive coupling from VREF to I OUT with the DAC loaded with all zeros. OUTPUT CURRENT SETTLING TIME The time required for the output current to settle to within +0.01% of final value for a full scale step. DIGITAL-TO-ANALOG GLITCH ENERGY The integrated area of the glitch pulse measured in nanovolt- seconds. The key contributor to digital-to-analog glitch is charge injected by digital logic switching transients. CIRCUIT DESCRIPTION Figure 1 shows a simplified schematic of a DAC8043. The current from the VREF pin is switched between IOUT and GND by 12 single-pole double-throw CMOS switches. This main- tains a constant current in each leg of the ladder regardless of the input code. The input resistance at V REF is therefore constant and can be driven by either a voltage or current, AC or DC, positive or negative polarity, and have a voltage range up to ±20V. A CMOS switch transistor, included in series with the ladder terminating resistor and in series with the feedback resistor, RFB, compensates for the temperature drift of the ON resis- tance of the ladder switches. Figure 2 shows an equivalent circuit for the DAC. COUT is the output capacitance due to the N-channel switches and varies from about 80pF to 110pF with digital input code. The current source I LKG is the combination of surface and junction leak- ages to the substrate. ILKG approximately doubles every 10°C. R O is the equivalent output resistance of the D/A and it varies with input code. FB R OUT I V REF I LKG R OUT C O R GND D IN 4096 x V REF R R FIGURE 2. Equivalent Circuit for the DAC. INSTALLATION ESD PROTECTION All digital inputs of the DAC8043 incorporate on-chip ESD protection circuitry. This protection is designed to withstand 2.5kV (using the Human Body Model, 100pF and 1500 Ω). However, industry standard ESD protection methods should be used when handling or storing these components. When not in use, devices should be stored in conductive foam or rails. The foam or rails should be discharged to the destina- tion socket potential before devices are removed. POWER SUPPLY CONNECTIONS The DAC8043 is designed to operate on VDD = +5V ±5%. For optimum performance and noise rejection, power supply decoupling capacitors CD should be added as shown in the application circuits. These capacitors (1 µF tantalum recom- mended) should be located close to the D/A. Output op amp analog common (+ input) should be connected as near to the GND pins of the DAC8043 as possible. WIRING PRECAUTIONS To minimize AC feedthrough when designing a PC board, care should be taken to minimize capacitive coupling be- tween the VREF lines and the IOUT lines. Coupling from any of the digital control or data lines might degrade the glitch performance. Solder the DAC8043 directly into the PC board without a socket. Sockets add parasitic capacitance (which can degrade AC performance). OUT I GND FB R 2R 2R 2R 2R 2R RR R V REF Bit 1 (MSB) Bit 2 Bit 3 Bit 12 (LSB) R FIGURE 1. Simplified Circuit Diagram for the DAC. |
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