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ISO121BG Datasheet(PDF) 8 Page - Burr-Brown (TI)

[Old version datasheet] Texas Instruments acquired Burr-Brown Corporation. Click here to check the latest version.
Part # ISO121BG
Description  Precision Low Cost ISOLATION AMPLIFIER
Download  16 Pages
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Manufacturer  BURR-BROWN [Burr-Brown (TI)]
Direct Link  http://www.burr-brown.com
Logo BURR-BROWN - Burr-Brown (TI)

ISO121BG Datasheet(HTML) 8 Page - Burr-Brown (TI)

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8
ISO120/121
BASIC OPERATION
Signal and Power Connections
Figure 3 shows proper power and signal connections. Each
power supply pin should be bypassed with 1
µF tantalum
capacitor located as close to the amplifier as possible. All
ground connections should be run independently to a com-
mon point if possible. Signal Common on both input and
output sections provide a high-impedance point for sensing
signal ground in noisy applications. Signal Common must
have a path to ground for bias current return and should be
maintained within
±1V of Gnd. The output sense pin may be
EXTERNAL CLOCK
FREQUENCY RANGE
C
X
400kHz to 700kHz
30pF
200kHz to 400kHz
180pF
100kHz to 200kHz
680pF
50kHz to 100kHz
1800pF
20kHz to 50kHz
3300pF
10kHz to 20kHz
0.01
µF
5kHz to 10kHz
0.022
µF
10k
C
X
OPA602
R
X
1µF
Sq Wave In
Triangle Out
to ISO120/121
Ext Osc
1k
FIGURE 2. Square Wave to Triangle Wave Signal Condi-
tioner for Driving ISO120/121 Ext Osc Pin.
TABLE II. Recommended C
X
Values vs Frequency for
Figure 2 Circuit.
C
1
(1)
C
1H
C
1L
–V
S1
+V
S1
+
+1µF
+1µF
+
+V
S1
Signal
Com1
Gnd1
V
IN
Guard
Ext
(2)
Osc
C
2
(1)
C
2H
C
2L
–V
S2
+V
S2
+
+1µF
Guard
1µF
+
+VS2
Gnd 2
Signal
Com 2
R
L
V
OUT
Sense
Isolation Barrier
NOTE: (1) Optional. See text. (2) Ground if not used.
FIGURE 3. Power and Signal Connections.
connected directly to V
OUT or may be connected to a remote
load to eliminate errors due to IR drops. Pins are provided
for use of external integrator capacitors. The C
1H and C2H
pins are connected to the integrator summing junctions and
are therefore particularly sensitive to external pickup. This
sensitivity will most often appear as degraded IMR or PSR
performance. AC or DC currents coupled into these pins
results in V
ERROR = IERROR X 200kΩ at the output. Guarding
of these pins to their respective Signal Common, or C
1L and
C
2L is strongly recommended. For similar reasons, long
traces or physically large capacitors are not desirable. If
wound-foil capacitors are used, the outside foil should be
connected to C
1L and C2L, respectively.
Optional Gain and Offset Adjustments
Rated gain accuracy and offset performance can be achieved
with no external adjustments, but the circuit of Figure 4a
may be used to provide a gain trim of
±0.5% for values
shown; greater range may be provided by increasing the size
of R
1
and R
2.
Every 2k
Ω increase in R
1
will give an
additional 1% adjustment range, with R
2 ≥ 2R1. If safety or
convenience dictates location of the adjustment potenti-
ometer on the other side of the barrier from the position
shown in Figure 4a, the positions of R
1 and R2 may be
reversed. Gains greater than one may be obtained by using
the circuit of Figure 4b. Note that the effect of input offset
errors will be multiplied at the output in proportion to the
increase in gain. Also, the small-signal bandwidth will be
decreased in inverse proportion to the increase in gain. In
most instances, a precision gain block at the input of the
isolation amplifier will provide better overall performance.
Figure 5 shows a method for trimming V
OS of the ISO120
and ISO121. This circuit may be applied to either Signal
Com (input or output) as desired for safety or convenience.
With the values shown,
±15V supplies and unity gain, the
circuit will provide
±150mV adjustment range and 0.25mV


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