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OPA602SM Datasheet(PDF) 7 Page - Burr-Brown (TI)

[Old version datasheet] Texas Instruments acquired Burr-Brown Corporation.
Part # OPA602SM
Description  High-Speed Precision Difet OPERATIONAL AMPLIFIER
Download  9 Pages
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Manufacturer  BURR-BROWN [Burr-Brown (TI)]
Direct Link  http://www.burr-brown.com
Logo BURR-BROWN - Burr-Brown (TI)

OPA602SM Datasheet(HTML) 7 Page - Burr-Brown (TI)

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®
OPA602
7
COMMON-MODE REJECTION
vs FREQUENCY
140
1
Frequency (Hz)
10
100
1k
10k
100k
1M
10M
120
100
80
60
40
20
0
POWER SUPPLY REJECTION
vs FREQUENCY
140
1
Frequency (Hz)
10
100
1k
10k
100k
1M
10M
120
100
80
60
40
20
0
+
BIAS AND OFFSET CURRENT
vs INPUT COMMON MODE VOLTAGE
10
1
0.1
0.01
–15
Common-Mode Voltage (V)
10
1
0.1
0.01
–10
–5
0
5
10
15
Bias Current
Offset Current
BIAS AND OFFSET CURRENT
vs TEMPERATURE
10nA
–50
Ambient Temperature (°C)
10nA
–25
0
25
50
75
100
125
1nA
100
10
1
0.1
1nA
100
10
1
0.1
TYPICAL PERFORMANCE CURVES (CONT)
TA = +25°C, VS = ±15VDC unless otherwise noted.
APPLICATIONS INFORMATION
Unity-gain stability with good phase margin and excellent
output drive characteristics bring freedom from the subtle
problems associated with other high speed amplifiers. But
with any high speed, wide bandwidth circuitry, careful
circuit layout will ensure best performance. Make short,
direct interconnections and avoid stray wiring capacitance—
especially at the inverting input pin.
Power supplies should be bypassed with good high fre-
quency capacitors positioned close to the op amp pins. In
most cases 0.1
µF ceramic capacitors are adequate. Applica-
tions with heavier loads and fast transient waveforms may
benefit from use of additional 1.0
µF tantalum bypass capaci-
tors.
INPUT BIAS CURRENT GUARDING
Leakage currents across printed circuit boards can easily
exceed the input bias current of the OPA602. A circuit board
“guard” pattern (Figure 1) is an effective solution to difficult
leakage problems. This guard pattern must be repeated on all
layers of a multilayer board. By surrounding critical high
impedance input circuitry with a low impedance circuit
connection at the same potential, leakage currents will flow
harmlessly to the low impedance node.
Input bias current may also be degraded by improper han-
dling or cleaning. Contamination from handling parts and
circuit boards may be cleaned with appropriate solvents and
deionized water. Each rinsing operation should be followed
by a 30-minute bake at +85
°C.


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