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OPA660AU Datasheet(PDF) 11 Page - Burr-Brown (TI) |
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OPA660AU Datasheet(HTML) 11 Page - Burr-Brown (TI) |
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11 / 18 page  11 ® OPA660 A positive voltage at the B, pin 3, causes a positive current to flow out of the C, pin 8. Figure 5b shows an amplifier connection of the OTA, the equivalent of a common-emitter transistor amplifier. Input and output can be ground-refer- enced without any biasing. Due to the sense of the output current, the amplifier is non-inverting. Figure 8 shows the amplifier with various gains and output voltages using this configuration. Just as transistor circuits often use emitter degeneration, OTA circuits may also use degeneration. This can be used to reduce the effect that offset voltage and offset current might otherwise have on the DC operating point of the OTA. The E-degeneration resistor may be bypassed with a large ca- pacitor to maintain high AC gain. Other circumstances may suggest a smaller value capacitor used to extend or optimize high-frequency performance. The transconductance of the OTA with degeneration can be calculated by— Figure 6b shows the OTA connected as an E-follower—a voltage buffer. The buffer formed by this connection per- forms virtually the same as the buffer section of the OPA660 (the actual signal path is identical). It is recommended to use a low value resistor in series with the B OTA and buffer inputs. This reduces any tendency to oscillate and controls frequency response peaking. Values from 25 Ω to 200Ω are typical. Figure 7 shows the Common-B amplifier. This configura- tion produces an inverting gain, and a low impedance input. This low impedance can be converted to a high impedance by inserting the buffer amplifier in series. CIRCUIT LAYOUT The high frequency performance of the OPA660 can be greatly affected by the physical layout of the circuit. The following tips are offered as suggestions, not dogma. • Bypass power supplies very close to the device pins. Use a combination between tantalum capacitors (approxi- mately 2.2 µF) and polyester capacitors. Surface-mount types are best because they provide lowest inductance. • Make short, wide interconnection traces to minimize series inductance. • Use a large ground plane to assure that a low impedance ground is available throughout the layout. • Do not extend the ground plane under high impedance nodes sensitive to stray capacitance. • Sockets are not recommended because they add signifi- cant inductance. FIGURE 8. Common-E Amplifier Performance. OTA R E 3 8 2 R G = , r = At I = 20mA r = = 8 G = at I = 20mA R L R + r EE E 1 125mA/V Q E 1 gm Ω R L R + 8 E Ω Q R L = RL1 + RL2 || RIN R L1 r E R 1 100 Ω L2 R IN Network Analyzer 50 Ω V I V O 15 10 5 0 –5 –10 –15 –20 –25 –30 1M 10M 100M 1G Frequency (Hz) 200mVp-p 2.8Vp-p –3dB Point 1.4Vp-p 600mVp-p I Q = 20mA R1 = 100Ω RE = 51Ω RL = 50Ω Gain = 1 20 300k 3G 15 10 5 0 –5 –10 –15 –20 –25 –30 1M 10M 100M 1G 200mVp-p 2.8Vp-p –3dB Point 1.4Vp-p 600mVp-p Frequency (Hz) I Q = 20mA R1 = 100Ω RE = 51Ω RL = 100Ω Gain = 2 20 300k 3G 15 10 5 0 –5 –10 –15 –20 –25 –30 1M 10M 100M 1G Frequency (Hz) I Q = 20mA R1 = 100Ω RE = 51Ω RL = 500Ω Gain = 10 20 100k 200mVp-p 1.4Vp-p 600mVp-p 5Vp-p 2.8Vp-p –3dB Point 1 g = m g m + RE 1 |
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