®

PCM1760P/U DF1760P/U

2

SPECIFICATIONS

ELECTRICAL

At T

PCM1760/DF1760

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

RESOLUTION

20

Bits

ANALOG INPUT

Input Range

Vp-p

Input Impedance

Ω

SAMPLING FREQUENCY

Cover Range of fs

30

48

50

kHz

ACCURACY

Gain Error

±0.5

±1.0

dB

Gain Mismatch

±0.5

dB

Bipolar Zero Error

±0.4

Gain Drift

0

°C to +70°C

±100

ppmfs/

°C

Bipolar Zero Drift

0

°C to +70°C

±20

ppmfs/

°C

THD+N/(0dBFS)

P, U

–92

–90

dB

P-L, U-L

–90

–88

dB

THD+N/(–20dBFS)

P, U

–76

–70

dB

P-L, U-L

–76

–70

dB

THD+N/(–60dBFS)

P, U

–44

–42

dB

P-L, U-L

–44

–42

dB

Dynamic Range

P, U

104

108

dB

P-L, U-L

104

108

dB

SNR

P, U

108

110

dB

P-L, U-L

106

110

dB

Frequency Response

±0.1

dB

Channel Separation

94

98

dB

DIGITAL FILTER

Over Sample Rate

64

fs

Ripple in Band

0 - 0.04535fs

±0.0001

dB

Stopband Attenuation –1

0.5465fs - 63.4535fs

–94

dB

Stopband Attenuation –2

0.5465fs - 3.4535fs

–100

dB

LOGIC INPUTS AND OUTPUTS

Logic Family Input

TTL Level Compatible CMOS

Frequency (System Clock 1)

256fs

12.288

MHz

Frequency (System Clock 2)

384fs

18.432

MHz

Duty Cycle (System Clock 1)

256fs

40

50

60

%

Duty Cycle (System Clock 2)

384fs

45

50

55

%

Data Clock Input

32

48

64

fs

Logic Family Output

CMOS

Data Clock Output

64

fs

Data Coding

Two's Complement

Data Bit Length

16

20

Bits

Data Format

Selectable

Output Data Delay

fs = 48kHz

1.5

ms

POWER SUPPLY REQUIREMENTS

Supply Voltage

±V

CC

PCM1760

±4.75

±5.0

±5.25

V

±V

dd

PCM1760

±4.75

±5.0

±5.25

V

DF1760

4.75

5.0

5.25

V

Supply Current

PCM1760

24

36

mA

PCM1760

–30

–45

mA

PCM1760

12

18

mA

PCM1760

–8

–12

mA

DF1760, Normal Mode

40

55

mA

DF1760, Power-Down Mode

4

6.6

mA

Power Consumption

PCM1760

370

500

mW

DF1760, Normal Mode

200

275

mW

DF1760, Power-Down Mode

20

33

mW

TEMPERATURE RANGE

Operating

PCM1760/DF1760

0

+25

+70

°C

Storage

PCM1760/DF1760

–50

+125

°C

NOTES: (1) Integrator Constants are determined by the external components shown in the block diagram. (2) FSR means Full Scale Range, digital output code is from

90000H to 70000H, FSR = 5.0V. (3) Use 20-bit DAC, 20kHz LPF, 400Hz HPF, average response. (4) Average response using a 20-bit reconstruction DAC with 20kHz

low-pass filter and 400Hz high-pass filter.