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PACSZ128402QR Datasheet(PDF) 3 Page - California Micro Devices Corp |
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PACSZ128402QR Datasheet(HTML) 3 Page - California Micro Devices Corp |
3 / 7 page © 2003 California Micro Devices Corp. All rights reserved. 09/15/03 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com 3 PACSZ1284 Specifications Note 1: Guaranteed by design and characterization. Note 2: ESD voltage applied between Input/Connector pins and ground, one pin at a time. Note 3: Pins 3-7, 9, 11, 13, and 14 typically connect to the I/O pins of a Super I/O chip. Note 4: Pins 1, 2, 8, 10, 12, 15-19, 21, and 23-28 typically connect to the Parallel Port connector. ABSOLUTE MAXIMUM RATINGS PARAMETER RATING UNITS VCC Voltage 5.5 V Input Voltage Range, no clamping -0.4 to 5.5 V Storage Temperature Range -40 to +150 °C Power Dissipation per Resistor 0.1 W Package Power Dissipation 1.0 W STANDARD OPERATING CONDITIONS PARAMETER RATING UNITS VCC Voltage 5.0 V Operating Temperature -40 to +85 °C ELECTRICAL OPERATING CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS TOLR Absolute Resistance Tolerance Measured at TA=25°C +20 % TOLC Absolute Capacitance Tolerance Measured at 1MHz, 2.5VDC, TA=25°C +20 % ILEAK Leakage current to GND Measured at 5.0VDC, TA=25°C 1 10 µA VESDi ESD protection, input pins Pins 3,4,5,6,7,9,11,13, & 14, per IEC 61000-4-2 specification, Notes 1,2,3 +8kV VESD ESD protection, connector pins Pins 1,2,8,10,12,15,16,17,18,19, 21,23,24,25,26,27, & 28, per IEC 61000-4-2 specification Notes 1,2,4 +30 kV VCLAMP Clamping voltage under ESD discharge ESD applied to connector pin, mea- sured at corresponding input pin; +8kV discharge, Human Body Model Notes 1,2 8.3 V ESD applied to connector pin, measured at corresponding input pin; -8kV discharge, Human Body Model; Notes 1,2 -2.7 V |
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