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XR28V384IM48TR-F Datasheet(PDF) 9 Page - Exar Corporation

Part # XR28V384IM48TR-F
Description  XR28V384 3.3V QUAD LPC UART WITH 128-BYTE FIFO
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XR28V384IM48TR-F Datasheet(HTML) 9 Page - Exar Corporation

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XR28V384
9
REV. 1.0.0
3.3V QUAD LPC UART WITH 128-BYTE FIFO
1.2.1.1
Start Frame
The Start frame indicates begining of the SERIRQ cycle. During this frame the SERIRQ is driven LOW for 4-8
clock cycles. It can be initiated by the host or V384 depending on the mode of operation.
In the Continuous mode, only the host controller initiates the Start frame to update the SERIRQ line
information. The host controller drives the SERIRQ signal low for 4 to 8 clock periods. Upon a reset, the
SERIRQ signal defaults to the Continuous mode for the host controller to initiate the first Start frame.
In the Quiet mode, the Start frame is initiated by the device/host. The V384 drives the SERIRQ signal active
low for one clock to initiate a Start Frame, and then tri-states it immediately. The host controller will then take
over driving SERIRQ signal low in the next clock and will continue driving the SERIRQ low for 3 to 7 clock
periods. This makes the total number of clocks low for 4 to 8 clock periods. After these clocks, the host
controller will drive the SERIRQ high for one clock and then tri-states it.
A Start Frame may not be initiated while SERIRQ is active. The SERIRQ is active between Start and Stop
frames while it is idle between Stop and Start frames.
1.2.1.2
IRQ Frame
Once the start frame has been initiated, all the peripherals must start counting frames based on the rising edge
of the clock (LCLK). Each IRQ Frame is three clocks: Sample phase, Recovery phase, and Turn-around
phase. During the Sample phase, the peripheral drives SERIRQ low if the corresponding IRQ is active. If the
corresponding IRQ is inactive, then SERIRQ will be left tri-stated. During the Recovery phase, the peripheral
device drives the SERIRQ high. During the Turn-around phase, the peripheral device leaves the SERIRQ tri-
stated. The V384 supports IRQ3, IRQ4, IRQ5, IRQ7, IRQ9, IRQ10, and IRQ11.
TABLE 4: SERIRQ SAMPLING PERIODS
IRQ/DATA FRAME
SIGNAL SAMPLED
NUMBER OF CLOCKS PAST START
1
IRQ0
2
2
IRQ1
5
3
SMI#
8
4
IRQ3
11
5
IRQ4
14
6
IRQ5
17
7
IRQ6
20
8
IRQ7
23
9
IRQ8
26
10
IRQ9
29
11
IRQ10
32
12
IRQ11
35
13
IRQ12
38
14
IRQ13
41
15
IRQ14
44
16
IRQ15
47
17
IOCHCK#
50
18
INTA#
53
19
INTB#
56
20
INTC#
59
21
INTD#
62
32:22
Unassigned
95


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