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ACT8840QM188-T Datasheet(PDF) 11 Page - Active-Semi, Inc

Part # ACT8840QM188-T
Description  Advanced PMU for Single-core Application Processors
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Manufacturer  ACTIVE-SEMI [Active-Semi, Inc]
Direct Link  http://www.active-semi.com
Logo ACTIVE-SEMI - Active-Semi, Inc

ACT8840QM188-T Datasheet(HTML) 11 Page - Active-Semi, Inc

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ACT8840
Rev 1, 07-Feb-14
Innovative PowerTM
- 11 -
www.active-semi.com
Copyright © 2014 Active-Semi, Inc.
Active-Semi Proprietary―For Authorized Recipients and Customers
ActivePMU
TM is a trademark of Active-Semi.
I2CTM is a trademark of NXP.
REGISTER AND BIT DESCRIPTIONS
BLOCK ADDRESS BIT
NAME
ACCESS
DESCRIPTION
SYS
0x00
[7]
nBATLEVMSK
R/W
Battery Voltage Level Interrupt Mask. Set this bit to 1 to unmask
the interrupt. See the Programmable Battery Voltage Monitor
section for more information
SYS
0x00
[6]
nBATSTAT
R
Battery Voltage Status. Value is 1 when BATLEV interrupt is
generated, value is 0 otherwise.
SYS
0x00
[5]
VBATDAT
R
Battery Voltage Monitor real time status. Value is 1 when VBAT
< BATLEV, value is 0 otherwise.
SYS
0x00
[4]
-
R/W
Reserved.
SYS
0x00
[3:0]
BATLEV
R/W
Battery Voltage Detect Threshold. Defines the BATLEV voltage
threshold. See the Programmable Battary Voltage Monitor
section for more information.
SYS
0x01
[7]
nTMSK
R/W
Thermal Interrupt Mask. Set this bit to 1 to unmask the interrupt.
SYS
0x01
[6]
TSTAT
R
Thermal Interrupt Status. Value is 1 when a thermal interrupt is
generated, value is 0 otherwise.
SYS
0x01
[5:0]
-
R/W
Reserved.
REG1
0x10
[7:6]
-
R
Reserved.
REG1
0x10
[5:0]
VSET0
R/W
Primary Output Voltage Selection. See the Output Voltage
Programming
section for more information
REG1
0x12
[7]
ON
R/W
Regulator Enable Bit. Set bit to 1 to enable the regulator, clear
bit to 0 to disable the regulator.
REG1
0x12
[6:3]
-
R
Reserved.
REG1
0x12
[2]
PHASE
R/W
Regulator Phase Control. Set bit to 1 for the regulator to operate
180° out of phase with the oscillator, clear bit to 0 for the
regulator to operate in phase with the oscillator.
REG1
0x12
[1]
nFLTMSK
R/W
Regulator Fault Mask Control. Set bit to 1 enable fault-interrupts,
clear bit to 0 to disable fault-interrupts.
REG1
0x12
[0]
OK
R
Regulator Power-OK Status. Value is 1 when output voltage
exceeds the power-OK threshold, value is 0 otherwise.
REG2
0x20
[7:6]
-
R
Reserved.
REG2
0x20
[5:0]
VSET0
R/W
Primary Output Voltage Selection. Valid when VSEL is driven
low. See the Output Voltage Programming section for more
information
REG2
0x21
[7:6]
-
R
Reserved.
REG2
0x21
[5:0]
VSET1
R/W
Secondary Output Voltage Selection. Valid when VSEL is driven
high. See the Output Voltage Programming section for more
information.
REG2
0x22
[7]
ON
R/W
Regulator Enable Bit. Set bit to 1 to enable the regulator, clear
bit to 0 to disable the regulator.
REG2
0x22
[6:3]
-
R
Reserved.
REG2
0x22
[2]
PHASE
R/W
Regulator Phase Control. Set bit to 1 for the regulator to operate
180° out of phase with the oscillator, clear bit to 0 for the
regulator to operate in phase with the oscillator.
REG2
0x22
[1]
nFLTMSK
R/W
Regulator Fault Mask Control. Set bit to 1 enable fault-interrupts,
clear bit to 0 to disable fault-interrupts.
REG2
0x22
[0]
OK
R
Regulator Power-OK Status. Value is 1 when output voltage
exceeds the power-OK threshold, value is 0 otherwise.
REG3
0x30
[7:6]
-
R
Reserved.
REG3
0x30
[5:0]
VSET0
R/W
Primary Output Voltage Selection. Valid when VSEL is driven
low. See the Output Voltage Programming section for more
information


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