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CAT24C44 Datasheet(PDF) 6 Page - Catalyst Semiconductor |
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CAT24C44 Datasheet(HTML) 6 Page - Catalyst Semiconductor |
6 / 8 page 6 CAT24C44 Doc. No. 25019-0A 2/98 N-1 WREN/WRDS The CAT24C44 powers up in the program disable state (the “write enable latch” is reset). Any programming after power-up or after a WRDS (RAM write/E2PROM store disable) instruction must first be preceded by the WREN (RAM write/E2PROM store enable) instruction. Once writing/storing is enabled, it will remain enabled until power to the device is removed, the WRDS instruc- tion is sent, or an E2PROM store has been executed 5157 FHD F05 Figure 4. Write Cycle Timing Figure 3. Read Cycle Timing 5157 FHD F04 x 12n SK CE tSKL tSKH 1/FSK tCEH tDH tDS tCES tCDS DI HIGH-Z tPD 6789 10 11 tPD tZ VIH HIGH-Z SK CYCLE # SK CE DI DO D0 D1 Dn (STO). The WRDS (write/store disable) can be used to disable all CAT24C44 programming functions, and will prevent any accidental writing to the RAM, or storing to the E2PROM. Data can be read normally from the CAT24C44 regard- less of the “write enable latch” status. |
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