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BM6203FS Datasheet(PDF) 3 Page - Rohm |
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BM6203FS Datasheet(HTML) 3 Page - Rohm |
3 / 24 page 3/21 Datasheet Datasheet BM6203FS TSZ02201-0828AB400110-1-2 © 2013 ROHM Co., Ltd. All rights reserved. 25.Jul.2013 Rev.001 http://www.rohm.com TSZ22111 · 15 · 001 Functional Descriptions 1. Control Input Pins (UH, UL, VH, VL, WH, WL) The input threshold voltages of the control pins are 2.5V and 0.8V, with a hysteresis voltage of approximately 0.4V. The IC will accept input voltages up to the VCC voltage. When the same phase control pins are input high at the same time, the high side and low side gate driver outputs become low. Dead time is installed in the control signals. The control input pins are connected internally to pull-down resistors (100k Ω nominal). However, the switching noise on the output stage may affect the input on these pins and cause undesired operation. In such cases, attaching an external pull-down resistor (10k Ω recommended) between each control pin and ground, or connecting each pin to an input voltage of 0.8V or less (preferably GND), is recommended. 2. Under Voltage Lock Out (UVLO) Circuit To secure the lowest power supply voltage necessary to operate the driver, and to prevent under voltage malfunctions, the UVLO circuits are independently built into the upper side floating driver and the lower side driver. When the supply voltage falls to VUVL or below, the controller forces driver outputs low. When the voltage rises to VUVH or above, the UVLO circuit ends the lockout operation and returns the chip to normal operation. Even if the controller returns to normal operation, the output begins from the following control input signal. Figure 4. Low Voltage Monitor - UVLO - Timing Chart Truth Table HIN LIN HO LO L L L L H L H L L H L H H H Inhibition Note) HIN: UH,VH,WH, LIN: UL,VL,WL VCC HIN LIN HO LO VB HIN LIN HO LO VCCUVH VCCUVL VBUVH VBUVL |
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