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MX25L1633EM2I10G Datasheet(PDF) 3 Page - Macronix International

Part # MX25L1633EM2I10G
Description  16M-BIT [x 1/x 2/x 4] CMOS MXSMIO??(SERIAL MULTI I/O) FLASH MEMORY
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Manufacturer  MCNIX [Macronix International]
Direct Link  http://www.macronix.com
Logo MCNIX - Macronix International

MX25L1633EM2I10G Datasheet(HTML) 3 Page - Macronix International

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MX25L1633E
P/N: PM1581
REV. 1.8, NOV. 08, 2013
(15) Deep Power-down (DP)...........................................................................................................................21
(16) Release from Deep Power-down (RDP), Read Electronic Signature (RES) ...........................................21
(17) Read Electronic Manufacturer ID & Device ID (REMS), (REMS2), (REMS4) .........................................22
Table 7. ID Definitions ....................................................................................................................................22
(18) Enter Secured OTP (ENSO)....................................................................................................................22
(19) Exit Secured OTP (EXSO).......................................................................................................................23
(20) Read Security Register (RDSCUR) .........................................................................................................23
Table 8. Security Register Definition ...............................................................................................................23
(21) Write Security Register (WRSCUR).........................................................................................................23
POWER-ON STATE ..................................................................................................................................24
ELECTRICAL SPECIFICATIONS.............................................................................................................25
Absolute Maximum Ratings ............................................................................................................................25
Figure 2. Maximum Negative Overshoot Waveform .......................................................................................25
Capacitance ....................................................................................................................................................25
Figure 3. Maximum Positive Overshoot Waveform .........................................................................................25
Figure 4. Input Test Waveforms and Measurement Level...............................................................................26
Figure 5. Output Loading.................................................................................................................................26
Table 9. DC Characteristics.............................................................................................................................27
Table 10. AC Characteristics ...........................................................................................................................28
Timing Analysis .......................................................................................................................................29
Figure 6. Serial Input Timing ...........................................................................................................................29
Figure 7. Output Timing...................................................................................................................................29
Figure 8. WP# Setup Timing and Hold Timing during WRSR when SRWD=1................................................30
Figure 9. Write Enable (WREN) Sequence (Command 06)............................................................................30
Figure 10. Write Disable (WRDI) Sequence (Command 04)...........................................................................30
Figure 11. Read Identification (RDID) Sequence (Command 9F)...................................................................31
Figure 12. Read Status Register (RDSR) Sequence (Command 05) .............................................................31
Figure 13. Write Status Register (WRSR) Sequence (Command 01)............................................................31
Figure 14. Read Data Bytes (READ) Sequence (Command 03) ...................................................................32
Figure 15. Read at Higher Speed (FAST_READ) Sequence (Command 0B) ...............................................32
Figure 16. 2 x I/O Read Mode Sequence (Command BB)..............................................................................33
Figure 17. 4 x I/O Read Mode Sequence (Command EB)..............................................................................33
Figure 18. 4 x I/O Read enhance performance Mode Sequence (Command EB)..........................................34
Figure 19. Page Program (PP) Sequence (Command 02).............................................................................35
Figure 20. 4 x I/O Page Program (4PP) Sequence (Command 38)...............................................................35
Figure 21. Sector Erase (SE) Sequence (Command 20)...............................................................................36
Figure 22. Block Erase (BE) Sequence (Command D8)................................................................................36
Figure 23. Chip Erase (CE) Sequence (Command 60 or C7)........................................................................36
Figure 24. Deep Power-down (DP) Sequence (Command B9)......................................................................37


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