MX25L3273EM2I10G datasheet(2/86 Pages) MCNIX

Part #	MX25L3273EM2I10G

Description	32M-BIT [x 1/x 2/x 4] CMOS MXSMIO짰 (SERIAL MULTI I/O) FLASH MEMORY

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Manufacturer	MCNIX [Macronix International]

Direct Link	http://www.macronix.com

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MX25L3273E

P/N: PM1906

REV. 1.1, NOV. 07, 2013

Contents

1. FEATURES ........................................................................................................................................................ 4

2. GENERAL DESCRIPTION ............................................................................................................................... 6

Table 1. Read Performance ..................................................................................................................6

3. PIN CONFIGURATION ...................................................................................................................................... 7

4. PIN DESCRIPTION............................................................................................................................................ 7

5. BLOCK DIAGRAM............................................................................................................................................. 8

6. DATA PROTECTION.......................................................................................................................................... 9

Table 2. Protected Area Sizes..............................................................................................................10

Table 3. 4K-bit Secured OTP Definition ............................................................................................... 11

7. MEMORY ORGANIZATION............................................................................................................................. 12

Table 4. Memory Organization .............................................................................................................12

8. DEVICE OPERATION...................................................................................................................................... 13

9. COMMAND DESCRIPTION............................................................................................................................. 14

Table 5. Command Sets.......................................................................................................................14

9-1.

Write Enable (WREN)..........................................................................................................................17

9-2.

Write Disable (WRDI)...........................................................................................................................18

9-3.

Read Identification (RDID)...................................................................................................................19

9-4.

Read Status Register (RDSR) .............................................................................................................20

9-5.

Write Status Register (WRSR).............................................................................................................23

Table 6. Protection Modes....................................................................................................................24

9-6.

Read Data Bytes (READ) ....................................................................................................................26

9-7.

Read Data Bytes at Higher Speed (FAST_READ) ..............................................................................27

9-8.

Dual Read Mode (DREAD)..................................................................................................................28

9-9.

2 x I/O Read Mode (2READ) ...............................................................................................................29

9-10. Quad Read Mode (QREAD) ................................................................................................................30

9-11. 4 x I/O Read Mode (4READ) ...............................................................................................................31

9-12. Performance Enhance Mode ...............................................................................................................32

9-13. Performance Enhance Mode Reset (FFh)...........................................................................................32

9-14. Sector Erase (SE)................................................................................................................................35

9-15. Block Erase (BE) .................................................................................................................................36

9-16. Block Erase (BE32K) ...........................................................................................................................37

9-17. Chip Erase (CE)...................................................................................................................................38

9-18. Page Program (PP) .............................................................................................................................39

9-19. 4 x I/O Page Program (4PP)................................................................................................................40

9-20. Continuous Program mode (CP mode)................................................................................................43

9-21. Deep Power-down (DP).......................................................................................................................45

9-22. Release from Deep Power-down (RDP), Read Electronic Signature (RES) .......................................46

9-23. Read Electronic Manufacturer ID & Device ID (REMS), (REMS2), (REMS4) .....................................48

9-24. ID Read................................................................................................................................................49

Table 7. ID Definitions .........................................................................................................................49

9-25. Enter Secured OTP (ENSO)................................................................................................................49

9-26. Exit Secured OTP (EXSO)...................................................................................................................49

9-27. Read Security Register (RDSCUR) .....................................................................................................50

Table 8. Security Register Definition ....................................................................................................51

9-28. Write Security Register (WRSCUR).....................................................................................................52

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MX25L3273EM2I10G Datasheet(PDF) 2 Page - Macronix International

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