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MAX6316M Datasheet(PDF) 7 Page - Maxim Integrated Products |
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MAX6316M Datasheet(HTML) 7 Page - Maxim Integrated Products |
7 / 14 page MAX6316–MAX6322 5-Pin µP Supervisory Circuits with Watchdog and Manual Reset 7 Maxim Integrated Bidirectional R RE ES SE ET T Output The MAX6316M/MAX6318MH/MAX6319MH are designed to interface with µPs that have bidirectional reset pins, such as the Motorola 68HC11. Like an open-drain output, these devices allow the µP or other devices to pull the bidirectional reset (RESET) low and assert a reset condi- tion. However, unlike a standard open-drain output, it includes the commonly specified 4.7k Ω pullup resistor with a P-channel active pullup in parallel. This configuration allows the MAX6316M/MAX6318MH/ MAX6319MH to solve a problem associated with µPs that have bidirectional reset pins in systems where sev- eral devices connect to RESET (Figure 3). These µPs can often determine if a reset was asserted by an exter- nal device (i.e., the supervisor IC) or by the µP itself (due to a watchdog fault, clock error, or other source), and then jump to a vector appropriate for the source of the reset. However, if the µP does assert reset, it does not retain the information, but must determine the cause after the reset has occurred. The following procedure describes how this is done in the Motorola 68HC11. In all cases of reset, the µP pulls RESET low for about four external-clock cycles. It then releases RESET, waits for two external-clock cycles, then checks RESET’s state. If RESET is still low, the µP concludes that the source of the reset was external and, when RESET eventually reaches the high state, it jumps to the normal reset vector. In this case, stored- state information is erased and processing begins from scratch. If, on the other hand, RESET is high after a delay of two external-clock cycles, the processor knows that it caused the reset itself and can jump to a different vector and use stored-state information to determine what caused the reset. A problem occurs with faster µPs; two external-clock cycles are only 500ns at 4MHz. When there are several devices on the reset line, and only a passive pullup resis- tor is used, the input capacitance and stray capacitance can prevent RESET from reaching the logic high state (0.8 VCC) in the time allowed. If this happens, all resets will be interpreted as external. The µP output stage is guaran- teed to sink 1.6mA, so the rise time can not be reduced considerably by decreasing the 4.7k Ω internal pullup resistance. See Bidirectional Pullup Characteristics in the Typical Operating Characteristics. The MAX6316M/MAX6318MH/MAX6319MH overcome this problem with an active pullup FET in parallel with the 4.7k Ω resistor (Figures 4 and 5). The pullup transistor holds RESET high until the µP reset I/O or the supervisory circuit itself forces the line low. Once RESET goes below VPTH, a comparator sets the transition edge flip-flop, indi- cating that the next transition for RESET will be low to high. When RESET is released, the 4.7k Ω resistor pulls RESET up toward VCC. Once RESET rises above VPTH but is below (0.85 x VCC), the active P-channel pullup turns on. Once RESET rises above (0.85 x VCC) or the 2µs one-shot times out, the active pullup turns off. The parallel combination of the 4.7k Ω pullup and the 4.7k Ω MR** CIN RESET RESET CIRCUITRY RESET*** WDI* VCC MAX6316M MAX6318MH MAX6319MH CSTRAY 68HC11 RESET CIRCUITRY CIN RESET VCC OTHER DEVICES CIN RESET MAX6316M/MAX6318MH MAX6316M/MAX6319MH ACTIVE-HIGH PUSH/PULL MAX6318MH/MAX6319MH * ** *** Figure 3. MAX6316M/MAX6318MH/MAX6319MH Supports Additional Devices on the Reset Bus |
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