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MX25L12836EZNI10G Datasheet(PDF) 3 Page - Macronix International |
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MX25L12836EZNI10G Datasheet(HTML) 3 Page - Macronix International |
3 / 69 page 3 MX25L12836E 3 P/N: PM1514 REV. 1.7, AUG. 01, 2012 (24) Write Security Register (WRSCUR).......................................................................................................... 28 (25) Write Protection Selection (WPSEL)......................................................................................................... 29 BP and SRWD if WPSEL=0 ............................................................................................................................. 29 The individual block lock mode is effective after setting WPSEL=1................................................................. 30 WPSEL Flow .................................................................................................................................................... 31 (26) Single Block Lock/Unlock Protection (SBLK/SBULK)............................................................................... 32 Block Lock Flow ............................................................................................................................................... 32 Block Unlock Flow............................................................................................................................................ 33 (27) Read Block Lock Status (RDBLOCK)....................................................................................................... 34 (28) Gang Block Lock/Unlock (GBLK/GBULK)................................................................................................. 34 (29) Clear SR Fail Flags (CLSR)...................................................................................................................... 34 (30) Read SFDP Mode (RDSFDP)................................................................................................................... 35 Read Serial Flash Discoverable Parameter (RDSFDP) Sequence.................................................................. 35 Table a. Signature and Parameter Identification Data Values ......................................................................... 36 Table b. Parameter Table (0): JEDEC Flash Parameter Tables ....................................................................... 37 Table c. Parameter Table (1): Macronix Flash Parameter Tables..................................................................... 39 POWER-ON STATE ...................................................................................................................................................41 ELECTRICAL SPECIFICATIONS..............................................................................................................................42 ABSOLUTE MAXIMUM RATINGS................................................................................................................... 42 Figure 2. Maximum Negative Overshoot Waveform ........................................................................................ 42 CAPACITANCE TA = 25°C, f = 1.0 MHz........................................................................................................... 42 Figure 3. Maximum Positive Overshoot Waveform .......................................................................................... 42 Figure 4. OUTPUT LOADING ......................................................................................................................... 43 Table 7. DC CHARACTERISTICS (Temperature = -40°C to 85°C for Industrial grade, VCC = 2.7V ~ 3.6V) . 44 Table 8. AC CHARACTERISTICS (Temperature = -40°C to 85°C for Industrial grade, VCC = 2.7V ~ 3.6V) 45 Timing Analysis ........................................................................................................................................................47 Figure 5. Serial Input Timing ............................................................................................................................ 47 Figure 6. Output Timing.................................................................................................................................... 47 Figure 7. WP# Setup Timing and Hold Timing during WRSR when SRWD=1................................................. 48 Figure 8. Write Enable (WREN) Sequence (Command 06)............................................................................. 48 Figure 9. Write Disable (WRDI) Sequence (Command 04).............................................................................. 48 Figure 10. Read Identification (RDID) Sequence (Command 9F).................................................................... 49 Figure 11. Read Status Register (RDSR) Sequence (Command 05) .............................................................. 49 Figure 12. Write Status Register (WRSR) Sequence (Command 01)............................................................. 49 Figure 13. Read Data Bytes (READ) Sequence (Command 03) .................................................................... 50 Figure 14. Read at Higher Speed (FAST_READ) Sequence (Command 0B) ................................................ 50 Figure 15. Dual Read Mode Sequence (Command 3B)................................................................................... 50 Figure 16. Quad Read Mode Sequence (Command 6B) ................................................................................. 51 Figure 17. Sector Erase (SE) Sequence (Command 20)................................................................................ 51 Figure 18. Block Erase (BE/EB32K) Sequence (Command D8/52)................................................................ 51 Figure 19. Chip Erase (CE) Sequence (Command 60 or C7)......................................................................... 52 Figure 20. Page Program (PP) Sequence (Command 02).............................................................................. 52 Figure 21. 4 x I/O Page Program (4PP) Sequence (Command 38)................................................................ 52 Figure 22. Continuously Program (CP) Mode Sequence with Software Detection (Command AD) ................ 53 Figure 23-1. Enter Parallel Mode (ENPLM) Sequence (Command 55) ........................................................... 54 Figure 23-2. Exit Parallel Mode (EXPLM) Sequence (Command 45) .............................................................. 54 |
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