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MAX9034AUD Datasheet(PDF) 7 Page - Maxim Integrated Products |
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MAX9034AUD Datasheet(HTML) 7 Page - Maxim Integrated Products |
7 / 9 page MAX9030/MAX9031/MAX9032/MAX9034 Low-Cost, Ultra-Small, Single/Dual/Quad Single-Supply Comparators 7 Maxim Integrated 1) Find the trip points of the comparator using these formulas: VTH = VREF + [((VDD - VREF)R2) / (R1 + R2) VTL = VREF(1 - (R2 / (R1 + R2))] where VTH is the threshold voltage at which the com- parator switches its output from high to low as VIN rises above the trip point. VTL is the threshold volt- age at which the comparator switches its output from low to high as VIN drops below the trip point. 2) The hysteresis band will be: VHYS = VTH - VTL = VDD(R2 / (R1 + R2)) 3) In this example, let VDD = +5V and VREF = +2.5V. VTH = 2.5V + 2.5(R2 / (R1 + R2))V and VTL = 2.5[1 - (R2 / (R1 + R2))] 4) Select R2. In this example, we will choose 1k Ω. 5) Select VHYS. In this example, we will choose 50mV. 6) Solve for R1. VHYS = VDD(R2 / (R1 + R2)) 0.050V = 5(1000 Ω/(R1 + 1000Ω))V where R1 ≈ 100kΩ, VTH = 2.525V, and VTL = 2.475V. The above-described design procedure assumes rail- to-rail output swing. If the output is significantly loaded, the results should be corrected. Board Layout and Bypassing Use 100nF bypass as a starting point. Minimize signal trace lengths to reduce stray capacitance. Minimize the capacitive coupling between IN- and OUT. For slow- moving input signals (rise-time > 1ms), use a 1nF capacitor between IN+ and IN-. Biasing for Data Recovery Digital data is often embedded into a bandwidth and amplitude-limited analog path. Recovering the data can be difficult. Figure 2 compares the input signal to a time-averaged version of itself. This self-biases the threshold to the average input voltage for optimal noise margin. Even severe phase distortion is eliminated from the digital output signal. Be sure to choose R1 and C1 so that: ƒCAR >> 1 / (2 πR1C1) where ƒCAR is the fundamental carrier frequency of the digital data stream. MAX9031 OUT IN+ IN- R2 R1 VIN VREF VDD VSS VDD Figure 1. Additional Hysteresis MAX9031 OUT IN+ IN- 10k Ω 0.1 µF VDD VIN VSS VDD Figure 2. Time Averaging of the Input Signal for Data Recovery |
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