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MX25U4033EZUI12G Datasheet(PDF) 11 Page - Macronix International |
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MX25U4033EZUI12G Datasheet(HTML) 11 Page - Macronix International |
11 / 68 page 11 MX25U4033E 11 P/N: PM1755 REV. 1.5, NOV. 14, 2013 Table 2. Protected Area Sizes Status Bit Protect Level BP3 BP2 BP1 BP0 0 0 0 0 0 (none) 0 0 0 1 1 (1block, protected block 7th) 0 0 1 0 2 (2blocks, protected block 6th~7th) 0 0 1 1 3 (4blocks, protected block 4th~7th) 0 1 0 0 4 (8blocks, protected all) 0 1 0 1 5 (8blocks, protected all) 0 1 1 0 6 (8blocks, protected all) 0 1 1 1 7 (8blocks, protected all) 1 0 0 0 8 (8blocks, protected all) 1 0 0 1 9 (8blocks, protected all) 1 0 1 0 10 (8blocks, protected all) 1 0 1 1 11 (8blocks, protected all) 1 1 0 0 12 (4blocks, protected block 0th~3rd) 1 1 0 1 13 (6blocks, protected block 0th~5th) 1 1 1 0 14 (7blocks, protected block 0th~6th) 1 1 1 1 15 (8blocks, protected all) Table 3. 4K-bit Secured OTP Definition II. Additional 4K-bit secured OTP for unique identifier: to provide 4K-bit One-Time Program area for setting de- vice unique serial number - Which may be set by factory or system maker. Please refer to "Table 3. 4K-bit Se- cured OTP Definition". - Security register bit 0 indicates whether the chip is locked by factory or not. - To program the 4K-bit secured OTP by entering 4K-bit secured OTP mode (with ENSO command), and going through normal program procedure, and then exiting 4K-bit secured OTP mode by writing EXSO command. - Customer may lock-down the customer lockable secured OTP by writing WRSCUR(write security register) command to set customer lock-down bit1 as "1". Please refer to "Table 9. Security Register Definition" for secu- rity register bit definition and "Table 3. 4K-bit Secured OTP Definition" for address range definition. Note: Once lock-down whatever by factory or customer, it cannot be changed any more. While in 4K-bit Secured OTP mode, array access is not allowed. Address range Size Standard Factory Lock Customer Lock xxx000~xxx00F 128-bit ESN (electrical serial number) Determined by customer xxx010~xxx1FF 3968-bit N/A |
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