Description

Designed for pulse width modulated (PWM) current control of

DC motors, theA3959 is capable of output currents to ±3Aand

operatingvoltagesto50V.Internalfixedoff-timePWMcurrent-

control timing circuitry can be adjusted via control inputs to

operate in slow, fast, and mixed current-decay modes.

PHASE and ENABLE input terminals are provided for use

in controlling the speed and direction of a DC motor with

externally applied PWM-control signals. Internal synchronous

rectification control circuitry is provided to reduce power

dissipation during PWM operation.

Internal circuit protection includes thermal shutdown with

hysteresis, undervoltage monitoring of supply and charge

pump, and crossover-current protection. Special power-up

sequencing is not required.

TheA3959 provides a choice of three power packages, a 24-pin

DIP with batwing tabs (package suffix ‘B’), a 24-lead SOIC

with four internally-fused pins (package suffix ‘LB’), and a

thin (<1.2 mm) 28-pin TSSOP with an exposed thermal pad

(suffix ‘LP’). In all cases, the power pins and tabs are at ground

potential and need no electrical isolation. Each package is lead

(Pb) free, with 100% matte tin leadframes.

29319.37K

Features and Benefits

▪ ±3 A, 50 V Output Rating

▪ Mixed, Fast, and Slow Current-Decay Modes

▪ Synchronous Rectification for Low Power Dissipation

▪ Internal UVLO and Thermal-Shutdown Circuitry

▪ Crossover-Current Protection

▪ Internal Oscillator for Digital PWM Timing

DMOS Full-Bridge PWM Motor Driver

Packages:

Functional Block Diagram

Not to scale

A3959

Package LP, 28-pin TSSOP

with exposed thermal pad

Package B, 24-pin DIP

with exposed tabs

Package LB, 24-pin SOIC

with internally fused pins

CHARGE PUMP

BANDGAP

TSD

UNDER-

VOLTAGE &

FAULT DETECT

CHARGE

PUMP

BANDGAP

REGULATOR

+

LOGIC

SUPPLY

LOAD

SUPPLY

Dwg. FP-048-2A

CONTROL LOGIC

SENSE

SLEEP

EXT MODE

PHASE

ENABLE

BLANK

PFD1

PFD2

REFERENCE

BUFFER &

10

CURRENT

SENSE

ZERO

CURRENT

DETECT

REF

PWM

TIMER

OSC

ROSC