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R5F64114DFB Datasheet(PDF) 8 Page - Renesas Technology Corp |
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R5F64114DFB Datasheet(HTML) 8 Page - Renesas Technology Corp |
8 / 102 page R01DS0062EJ0130 Rev.1.30 Page 8 of 93 Mar 3, 2014 R32C/111 Group 1. Overview 1.3 Block Diagram Figures 1.2 and 1.3 show block diagram of the R32C/111 Group. Figure 1.2 R32C/111 Group Block Diagram for the 100-pin Package Port P0 Port P1 Port P2 Port P3 Port P4 Port P5 Port P6 8 8 8 8 8 8 8 VCC2 VCC1 X-Y converter: 16 bits × 16 bits CRC calculator (CCITT) X 16 + X12 + X5 + 1 Watchdog timer: 15 bits R32C/100 Series CPU Core R2R0 R3R1 R6R4 R7R5 A0 A1 A2 A3 FB SB FLG INTB ISP USP PC SVF SVP VCT Memory ROM RAM Multiplier Floating-point unit R2R0 R3R1 R6R4 R7R5 A0 A1 A2 A3 FB SB D/A converter: 8 bits × 2 channels A/D converter: 10 bits × 1 circuit Standard: 10 inputs Maximum: 26 inputs Timer: Timer A 16 bits × 5 timers Timer B 16 bits × 6 timers Three-phase motor controller Serial interface: 9 channels Intelligent I/O Time measurement: 16 Wave generation: 19 Serial interface: - Variable-length synchronous serial I/O -IEBus Clock generator: 4 circuits -XIN-XOUT - XCIN-XCOUT - On-chip oscillator - PLL frequency synthesizer DMAC DMAC II Peripherals |
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