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TNA088AE Datasheet(PDF) 5 Page - Renesas Technology Corp |
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TNA088AE Datasheet(HTML) 5 Page - Renesas Technology Corp |
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5 / 9 page  Page 5 of 9 RENESAS TECHNICAL UPDATE TN-RX*-A0 88A/E Date: Feb. 25, 2014 12. Flash P/E Mode Control Register (FPMCR) 13. Flash Area Select Register (FASR) 14. Flash Processing Start Address Register L (FSARL) Address(es): 007F FF80h b7 b6 b5 b4 b3 b2 b1 b0 FMS2 LVPE — FMS1 RPDIS — FMS0 — Value after reset: 00 001000 Bit Symbol Bit Name Description R/W b0 — Reserved This bit is read as 0. The write value should be 0. R/W b1 FMS0 Flash Operating Mode Select 0 FMS2 FMS1 FMS0 0 0 0: ROM read mode 0 1 1: Discharge mode 1 1 1 1: Discharge mode 2 1 0 1: ROM P/E mode 0 1 0: E2 DataFlash P/E mode Settings other than above are prohibited. R/W b2 — Reserved This bit is read as 0. The write value should be 0. R/W b3 RPDIS ROM P/E Disable 0: ROM programming/erasure enabled 1: ROM programming/erasure disabled R/W b4 FMS1 Flash Operating Mode Select 1 See the FMS0 bit. R/W b5 — Reserved This bit is read as 0. The write value should be 0. R/W b6 LVPE Low-Voltage P/E Mode Enable 0: Low-voltage P/E mode disabled 1: Low-voltage P/E mode enabled R/W b7 FMS2 Flash Operating Mode Select 2 See the FMS0 bit. R/W Address(es): 007F FF81h b7 b6 b5 b4 b3 b2 b1 b0 ——— ———— EXS Value after reset: 00 000000 Bit Symbol Bit Name Description R/W b0 EXS Extra Area Select 0: User area or data area 1: Extra area R/W b7 to b1 — Reserved These bits are read as 0. The write value should be 0. R/W Address(es): 007F FF82h b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 Value after reset: 00 000000 0000000 0 |
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