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NIPXI-5142 Datasheet(PDF) 7 Page - National Instruments Corporation

Part # NIPXI-5142
Description  100 MS/s, 14-Bit Digitizers for Communications
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Manufacturer  NI [National Instruments Corporation]
Direct Link  http://www.NI.com
Logo NI - National Instruments Corporation

NIPXI-5142 Datasheet(HTML) 7 Page - National Instruments Corporation

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Specification
Value
Comments
Phase Noise
Density, Typical
<–100 dBc/Hz at 100 Hz
<–120 dBc/Hz at 1 kHz
<–130 dBc/Hz at 10 kHz
10 MHz input signal.
Sample Clock
Jitter, Typical
≤1 ps rms (100 Hz to 100 kHz)
≤2 ps rms (100 Hz to 1 MHz)
Includes the effects of the converter aperture uncertainty and the clock circuitry jitter. Excludes trigger
jitter.
Timebase
Frequency
100 MHz
Timebase
Accuracy
Not Phase-Locked to
Reference Clock
Phase-Locked to
Reference Clock
ppm = parts per million (1 × 10
)
–6
±25 ppm
Equal to the
Reference Clock
accuracy
Sample Clock
Delay Range
±1 Sample Clock period
Sample Clock
Delay Resolution
≤10 ps
External Sample Clock
Sources
NI PXI-5142
NI PCI-5142
CLK IN (front panel SMB
connector)
PXI Star Trigger
(backplane connector)
CLK IN (front panel
SMB connector)
Frequency
Range
30 MHz to 105 MHz (CLK IN)
30 MHz to 80 MHz (PXI Star Trigger)
In normal operation mode (non-OSP mode), divide by
decimation is available where 1 ≤
≤ 65,535.
n
n
For more information about Sample Clock and decimation, refer to the
.
NI High-Speed Digitizers Help
Non-OSP decimation does not protect the acquired data from undersampling aliasing. Non-OSP
decimation and OSP decimation are mutually exclusive.
Duty Cycle
Tolerance
45% to 55%
Sample Clock Exporting
Exported
Sample Clock
Destinations
Destination
Maximum Frequency
* Decimated Sample Clock only.
CLK OUT (front panel
SMB connector)
105 MHz
PXI_Trig <0..6>
(backplane connector)*
20 MHz
PFI <0..1> (front panel
9-pin mini-circular DIN
connector)*
25 MHz
RTSI<0..6>*
20 MHz
Phase-Locked Loop (PLL) Reference Clock
Specification
Value
Comments
Sources
NI PXI-5142
NI PCI-5142
PXI_CLK10 (backplane connector)
CLK IN (front panel SMB connector)
RTSI 7
CLK IN (front panel SMB connector)
Frequency Range
1 MHz to 20 MHz in 1 MHz increments. Default of 10 MHz.
The PLL Reference Clock frequency has to be accurate to ±50 ppm.
Duty Cycle Tolerance
45% to 55%
Exported Reference Clock Destinations NI PXI-5142
NI PCI-5142
CLK OUT (front panel SMB connector)
PFI <0..1> (front panel 9-pin mini-circular DIN connector)
PXI_Trig <0..7> (backplane connector)
CLK OUT (front panel SMB connector)
PFI <0..1> (front panel 9-pin mini-circular DIN connector)
RTSI <0..7>


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