M25PX16-VMN6TP datasheet(32/65 Pages) NUMONYX

Part #	M25PX16-VMN6TP

Description	16-Mbit, dual I/O, 4-Kbyte subsector erase, serial Flash memory with 75 MHz SPI bus interface

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Manufacturer	NUMONYX [Numonyx B.V]

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Instructions

M25PX16

32/65

When the highest address is reached, the address counter rolls over to 00 0000h, so that

the read sequence can be continued indefinitely.

Figure 15.

Dual Output Fast Read instruction sequence

1.

A23 to A22 are Don't care.

6.9

Read Lock Register (RDLR)

The device is first selected by driving Chip Select (S) Low. The instruction code for the Read

Lock Register (RDLR) instruction is followed by a 3-byte address (A23-A0) pointing to any

location inside the concerned sector. Each address bit is latched-in during the rising edge of

Serial Clock (C). Then the value of the Lock Register is shifted out on Serial Data output

(DQ1), each bit being shifted out, at a maximum frequency fC, during the falling edge of

Serial Clock (C).

The instruction sequence is shown in Figure 16.

The Read Lock Register (RDLR) instruction is terminated by driving Chip Select (S) High at

any time during data output.

Any Read Lock Register (RDLR) instruction, while an Erase, Program or Write cycle is in

progress, is rejected without having any effects on the cycle that is in progress.

2

1

3

456789 10

28 29 30 31

0

23 22 21

3

2

1

0

Mode 3

Mode 2

C

DQ0

S

DQ1

High Impedance

Instruction

24-bit address

C

DQ0

S

DQ1

32 33 34

36 37 38 39 40 41 42 43 44 45 46

753175

1

3

DATA OUT 1

Dummy byte

MSB

7

531

7531

MSB

47

6420

6

4

0

2

35

642064

0

2

MSB

DATA OUT 2

DATA OUT 3

DATA OUT n

ai13574

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M25PX16-VMN6TP Datasheet(PDF) 32 Page - Numonyx B.V

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