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THS4509 Datasheet(PDF) 2 Page - National Semiconductor (TI) |
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THS4509 Datasheet(HTML) 2 Page - National Semiconductor (TI) |
2 / 42 page THS4509 SLOS454H – JANUARY 2005 – REVISED NOVEMBER 2009 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGING/ORDERING INFORMATION(1) PACKAGED DEVICES TEMPERATURE QUAD QFN(2) (3) SYMBOL (RGT-16) THS4509RGTT –40°C to +85°C — THS4509RGTR (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) This package is available taped and reeled. The R suffix standard quantity is 3000. The T suffix standard quantity is 250. (3) The exposed thermal pad is electrically isolated from all other pins. ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range, unless otherwise noted. UNIT VS– to VS+ Supply voltage 6 V VI Input voltage ±VS VID Differential input voltage 4 V IO Output current(2) 200 mA Continuous power dissipation See Dissipation Rating Table TJ Maximum junction temperature +150°C TA Operating free-air temperature range –40°C to +85°C Tstg Storage temperature range –65°C to +150°C HBM 2000 V ESD ratings CDM 1500 V MM 100 V (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) The THS4509 incorporates a (QFN) exposed thermal pad on the underside of the chip. This pad acts as a heatsink and must be connected to a thermally dissipative plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature which could permanently damage the device. See TI technical briefs SLMA002 and SLMA004 for more information about using the QFN thermally-enhanced package. DISSIPATION RATINGS TABLE POWER RATING PACKAGE θJC θJA TA ≤ +25°C TA = +85°C RGT (16) 2.4°C/W 39.5°C/W 2.3 W 225 mW 2 Submit Documentation Feedback Copyright © 2005–2009, Texas Instruments Incorporated Product Folder Link(s): THS4509 |
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