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CS5253-1GDP5 Datasheet(PDF) 3 Page - Cherry Semiconductor Corporation |
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CS5253-1GDP5 Datasheet(HTML) 3 Page - Cherry Semiconductor Corporation |
3 / 9 page Package Pin Description PACKAGE PIN # PIN SYMBOL FUNCTION 3 Block Diagram V CONTROL BIAS and TSD V REF EA IA V OUT V SENSE Adjust - + - + V POWER 5Lead D2 PAK 1VSENSE This Kelvin sense pin allows for remote sensing of the output voltage at the load for improved regulation. It is internally connected to the positive input of the voltage sensing error amplifier. 2 Adjust This pin is connected to the low side of the internally trimmed 1% bandgap reference voltage and carries a bias current of about 50µA. A resistor divider from Adj to VOUT and from Adj to ground sets the output voltage. Also, transient response can be improved by adding a small bypass capacitor from this pin to ground. 3VOUT This pin is connected to the emitter of the power pass transistor and provides a regulated voltage capable of sourcing 3A of current. 4VCONTROL This is the supply voltage for the regulator control circuitry. For the device to regulate, this voltage should be between 0.9V and 1.3V (depending on the output current) greater than the output voltage. The control pin current will be about 1% of the output current. 5VPOWER This is the power input voltage. The pin is physically connected to the collector of the power pass transistor. For the device to regulate, this voltage should be between 0.1V and 0.6V greater than the output voltage, depending on output current. The out- put load current of 3A is supplied through this pin. |
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