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L9733CNTR Datasheet(PDF) 6 Page - STMicroelectronics |
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L9733CNTR Datasheet(HTML) 6 Page - STMicroelectronics |
6 / 34 page Pin description L9733 6/34 Doc ID 11319 Rev 11 1 Pin description Figure 1. Pin connection (top view) Table 2. Pin description N° Pin Function 1 VDD 5 Volt supply input 2 SCLK SPI serial clock input 3 CS SPI chip select (active low) 4 SRC1 Source pin of configurable driver #1 (0.7 Rds on @ +25 °C) 5 DRN1 Drain pin of configurable driver #1(0.7 Rds on @ +25 °C) 6 DRN2 Drain pin of configurable driver #2 (0.7 Rds on @ +25 °C) 7 SRC2 Source pin of configurable driver #2 (0.7 Rds on @ +25 °C) 8 SRC3 Source pin of configurable driver #3 (0.7 Rds on @ +25 °C) 9 DRN3 Drain pin of configurable driver #3 (0.7 Rds on @ +25 °C) 10 DRN4 Drain pin of configurable driver #4 (0.7 Rds on @ +25 °C) 11 SRC4 Source pin of configurable driver #4 (0.7 Rds on @ +25 °C) 12 IN6 Discrete input used to PWM output driver #6 13 IN7 Discrete input used to PWM output driver #7 14 Vbat Battery supply voltage 15 GND Analog ground 16 IN8 Discrete input used to PWM output driver #8 17 RES Reset input (active low) 18 SRC5 Source pin of configurable driver #5 (0.7 Rds on @ +25 °C) VDD SCLK CS SRC1 DRN1 SRC2 DRN2 SRC3 DRN3 DRN6 SRC6 SRC7 DRN8 DRN7 SRC8 D1 D0 VDO 1 3 2 4 5 6 7 8 9 26 25 24 23 22 20 21 19 27 10 28 DRN4 DRN5 D06AT544 SRC4 IN6 IN7 IN8 RES SRC5 11 12 13 18 16 17 15 14 Vbat GND |
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