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AT25DF641-MWH-Y Datasheet(PDF) 4 Page - List of Unclassifed Manufacturers |
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AT25DF641-MWH-Y Datasheet(HTML) 4 Page - List of Unclassifed Manufacturers |
4 / 56 page 4 AT25DF641 3680F–DFLASH–4/10 Table 1-1. Pin Descriptions (Continued) Symbol Name and Function Asserted State Type HOLD : The pin is used to temporarily pause serial communication without deselecting or resetting the device. While the pin is asserted, transitions on the SCK pin and data on the SI pin will be ignored, and the SO pin will be in a high- impedance state. The pin must be asserted, and the SCK pin must be in the low state in order for a Hold condition to start. A Hold condition pauses serial communication only and does not have an effect on internally self-timed operations such as a program or erase cycle. Please refer to “Hold” on page 45 for additional details on the Hold operation. The pin is internally pulled-high and may be left floating if the Hold function will not be used. However, it is recommended that the pin also be externally connected to VCC whenever possible. Low Input VCC DEVICE POWER SUPPLY: The VCC pin is used to supply the source voltage to the device. Operations at invalid VCC voltages may produce spurious results and should not be attempted. − Power GND GROUND: The ground reference for the power supply. GND should be connected to the system ground. − Power Figure 1-1. 8-VDFN (Top View) Figure 1-2. 16-SOIC (Top View) 1 2 3 4 8 7 6 5 CS SO (SOI) WP GND VCC HOLD SCK SI (SIO) 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 HOLD VCC NC NC NC NC CS SO (SOI) SCK SI(SIO) NC NC NC NC GND WP CS HOLD HOLD HOLD HOLD HOLD |
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