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EPM9400 Datasheet(PDF) 5 Page - Altera Corporation |
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EPM9400 Datasheet(HTML) 5 Page - Altera Corporation |
5 / 46 page Altera Corporation 5 MAX 9000 Programmable Logic Device Family Data Sheet The MAX 9000 family is supported by Altera’s MAX+PLUS II development system, a single, integrated software package that offers schematic, text—including VHDL, Verilog HDL, and the Altera Hardware Description Language (AHDL)—and waveform design entry, compilation and logic synthesis, simulation and timing analysis, and device programming. The MAX+PLUS II software provides EDIF 2 0 0 and 3 0 0, LPM, and other interfaces for additional design entry and simulation support from other industry-standard PC- and UNIX- workstation-based EDA tools. The MAX+PLUS II software runs on Windows-based PCs as well as Sun SPARCstation, HP 9000 Series 700/800, and IBM RISC System/6000 workstations. f For more information on development tools, see the MAX+PLUS II Programmable Logic Development System & Software Data Sheet. Functional Description MAX 9000 devices use a third-generation MAX architecture that yields both high performance and a high degree of utilization for most applications. The MAX 9000 architecture includes the following elements: ■ Logic array blocks ■ Macrocells ■ Expander product terms (shareable and parallel) ■ FastTrack Interconnect ■ Dedicated inputs ■ I/O cells Figure 1 shows a block diagram of the MAX 9000 architecture. |
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Similar Description - EPM9400 |
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