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MC68HC11A0FN Datasheet(PDF) 7 Page - Motorola, Inc |
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MC68HC11A0FN Datasheet(HTML) 7 Page - Motorola, Inc |
7 / 45 page MC68HC11A8 MOTOROLA MC68HC11A8TS/D 7 Figure 4 Address/Data Demultiplexing Special bootstrap mode allows special purpose programs to be entered into internal RAM. The boot- loader program uses the SCI to read a 256-byte program into on-chip RAM at $0000 through $00FF. After receiving the character for address $00FF, control passes to the loaded program at $0000. Special test mode is used primarily for factory testing. 2.1 Memory Maps Memory locations are the same for expanded multiplexed and single-chip modes. The on-board 256- byte RAM is initially located at $0000 after reset. The 64-byte register block originates at $1000 after reset. RAM and/or the register block can be placed at any other 4K boundary ($x000) after reset by writ- ing an appropriate value to the INIT register. The 512-byte EEPROM is located at $B600 through $B7FF after reset if it is enabled. The 8 Kbyte ROM is located at $E000 through $FFFF if it is enabled. Hardware priority is built into the memory remapping. Registers have priority over RAM, and RAM has priority over ROM. The higher priority resource covers the lower, making the underlying locations inac- cessible. In special bootstrap mode, a bootloader ROM is enabled at locations $BF40 through $BFFF. In special test and special bootstrap modes, reset and interrupt vectors are located at $BFC0 through $BFFF. PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 D1 D2 D3 D4 D5 D6 D7 D8 LE Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 OE A7 A6 A5 A4 A3 A2 A1 A0 R/W E WE A15 A14 A13 A12 A11 A10 A9 A8 MC54/74HC373 D7 D6 D5 D4 D3 D2 D1 D0 AS MC68HC11A8 |
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