W137
5
Absolute Maximum Ratings
Stresses greater than those listed in this table may cause per-
manent damage to the device. These represent a stress rating
only. Operation of the device at these or any other conditions
above those specified in the operating sections of this specifi-
cation is not implied. Maximum conditions for extended peri-
ods may affect reliability.
.
Parameter
Description
Rating
Unit
VDD, VIN
Voltage on any pin with respect to GND
–0.5 to +7.0
V
TSTG
Storage Temperature
–65 to +150
°C
TA
Operating Temperature
0 to +70
°C
TB
Ambient Temperature under Bias
–55 to +125
°C
ESDPROT
Input ESD Protection
2 (min.)
kV
DC Electrical Characteristics:
TA = 0°C to +70°C; VDDQ3 = 3.3V±5%; VDDQ2 = 2.5V±5%; CPU0:1 = 66.6/100 MHz
Parameter
Description
Test Condition
Min.
Typ.
Max.
Unit
Supply Current
IDD3PD
3.3V Supply Current in Power-down mode
PWR_DWN# = 0
1
5
mA
IDD3
3.3V Supply Current
Outputs Loaded[1]
80
100
mA
IDD2
2.5V Supply Current
Outputs Loaded[1]
30
45
mA
IDD2PD
2.5V Supply Current in Power-down mode
PWR_DWN# = 0
0.2 µA
1
mA
Logic Inputs
VIL
Input Low Voltage
GND – 0.3
0.8
V
VIH
Input High Voltage
2.0
VDD + 0.3
V
IIL
Input Low Current[2]
–25
µA
IIH
Input High Current[2]
10
µA
IIL
Input Low Current (SEL100/66#)
–5µA
IIH
Input High Current (SEL100/66#)
+5
µA
Clock Outputs
VOL
Output Low Voltage
IOL = 1 mA
50
mV
VOH
Output High Voltage
PCI_F, PCI1:5,
REF0:1
IOH = –1 mA
3.1
V
VOH
Output High Voltage
CPU0:1
IOH = –1 mA
2.2
V
IOL
Output Low Current:
CPU0:1
VOL = 1.25V
80
120
180
mA
PCI_F, PCI1:5
VOL = 1.5V
70
110
140
mA
REF0:1
VOL = 1.5V
50
70
90
mA
IOH
Output High Current
CPU0:1
VOH = 1.25V
80
120
180
mA
PCI_F, PCI1:5
VOH = 1.5V
70
110
140
mA
REF0:1
VOH = 1.5V
50
70
90
mA
Crystal Oscillator
VTH
X1 Input Threshold Voltage[3]
VDDQ3 = 3.3V
1.65
V
CLOAD
Load Capacitance, As Seen by External Crystal[4]
14
pF
CIN,X1
X1 Input Capacitance[5]
Pin X2 unconnected
28
pF
Notes:
1.
All clock outputs loaded with 6" 60
Ω transmission lines with 20-pF capacitors.
2.
CPU_STOP#, PCI_STOP#, PWR_DWN#, SPREAD#, and SEL48# logic inputs have internal pull-up resistors (not CMOS level).
3.
X1 input threshold voltage (typical) is VDD/2.
4.
The W137 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. Total load placed on crystal is
14 pF; this includes typical stray capacitance of short PCB traces to crystal.
5.
X1 input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected).
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