W42C31-06
2
Functional Description
The W42C31-06 uses a phase-locked loop (PLL) to frequency
modulate an input clock. The result is an output clock whose
frequency is slowly swept over a narrow band near the input
signal. The basic circuit topology is shown in Figure 1. An
on-chip crystal driver causes the crystal to oscillate at its fun-
damental. The resulting reference signal is divided by Q and
fed to the phase detector. A signal from the VCO is divided by
P and fed back to the phase detector also. The PLL will force
the frequency of the VCO output signal to change until the
divided output signal and the divided reference signal match
at the phase detector input. The output frequency is then equal
to the ratio of P/Q times the reference frequency. The unique
feature of the Spread Spectrum Clock Generator is that a mod-
ulating waveform is superimposed at the input to the VCO.
This causes the VCO output to be slowly swept across a pre-
determined frequency band.
Because the modulating frequency is typically 1000 times
slower than the fundamental clock, the spread spectrum pro-
cess has little impact on system performance.
Frequency Selection With SSFTG
In Spread Spectrum Frequency Timing Generation, EMI re-
duction depends on the shape, modulation percentage, and
frequency of the modulating waveform. While the shape and
frequency of the modulating waveform are fixed, the modula-
tion percentage may be varied.
Using the frequency select bit (FS0), the spreading percent-
age can be chosen (see Table 1).
A larger spreading percentage improves EMI reduction. How-
ever, large spread percentages may either exceed system
maximum frequency ratings or lower the average frequency to
a point where performance is affected. For these reasons,
spreading percentages between ±0.5% and ±2.5% are most
common.
The W42C31 features the ability to select from various spread
spectrum
characteristics.
Selections
specific
to
the
W42C31-06 are shown in Table 1. Other spreading character-
istics are available (see separate data sheets) or can be cre-
ated with a custom mask.
Pin Definitions
Pin Name
Pin No.
Pin
Type
Pin Description
CLKOUT
5
O
Output Modulated Frequency: Frequency modulated copy of the unmodulated input
clock (multiplier of 3).
X1
1
I
Crystal Connection or External Reference Frequency Input: This pin has dual
functions. It may either be connected to an external crystal, or to an external reference
clock.
X2
2
I
Crystal Connection: If using an external reference, this pin must be left unconnected.
SSON#
8
I
Spread Spectrum (Active LOW): Pulling this input signal HIGH turns the internal
modulating waveform off. This pin has an internal pull-down resistor.
FS0
4
I
Frequency Selection Bit 0: This pin selects the frequency spreading
characteristics. Refer to Table 1. This pin has an internal pull-up resistor.
NC
7
NC
No Connect: This pin must be left unconnected.
VDD
6
P
Power Connection: Connected to 5V power supply.
GND
3
G
Ground Connection: This should be connected to the common ground plane.
Figure 1. System Block Diagram
XTAL
Freq.
Phase
Modulating
VCO
Post
CLKOUT
Detector
Charge
Pump
Waveform
Dividers
Divider
Feedback
Divider
PLL
GND
VDD
X1
X2
Crystal load
capacitors
as needed
Σ
Q
P
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