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DS1135U-15 Datasheet(PDF) 6 Page - Dallas Semiconductor |
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DS1135U-15 Datasheet(HTML) 6 Page - Dallas Semiconductor |
6 / 6 page DS1135 6 of 6 TERMINOLOGY Period: The time elapsed between the leading edge of the first pulse and the leading edge of the following pulse. tWI(Pulse Width): The elapsed time on the pulse between the 1.5-volt point on the leading edge and the 1.5-volt point on the trailing edge or the 1.5-volt point on the trailing edge and the 1.5-volt point on the leading edge. tRISE (Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the input pulse. tFALL (Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge on the input pulse. tPLH (Time Delay, Rising): The elapsed time between the 1.5-volt point on the leading edge of the input pulse and the 1.5-volt point on the leading edge of the output pulse. tPHL (Time Delay, Falling): The elapsed time between the 1.5-volt point on the falling edge of the input pulse and the 1.5-volt point on the falling edge of the output pulse. ORDERING INFORMATION DS1135 TIME DELAY (ns): 5, 6, 8, 10, 12, 15, 20, 25, 30 PACKAGE TYPE: M = DIP Z = SOIC (150 Mil) U = uSOP (118 Mil) |
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