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CTK24BC16Q8 Datasheet(PDF) 3 Page - Cystech Electonics Corp. |
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CTK24BC16Q8 Datasheet(HTML) 3 Page - Cystech Electonics Corp. |
3 / 12 page CYStech Electronics Corp. Spec. No. : C705Q8 Issued Date : 2007.08.22 Revised Date : Page No. : 3/12 CTK24BC01-16Q8 CYStek Product Specification Pin Descriptions Serial Data(SDA): The SDA pin used for sending and receiving data bits in serial mode. Since the SDA pin is defined as an open-drain connection, a pull-up resistor is needed. Serial Clock(SCL): The SCL input is used to synchronize data input and output with clocked out on the falling edge of SCL. Device/Page Addresses(A2, A1, A0): The A2, A1, and A0 pins are used to address multiple devices on a single bus system and should be hard-wired. ● The CTK24BC01 and CTK24BC02 use the A2, A1 and A0 pins to provide the capability for addressing up to eight 1K/2K devices on a single bus system (please see the Device Addressing section for further details) ● The CTK24BC04 uses the A2 and A1 inputs and a total of for 4K device may be addressed on a single bus system. The A0 pin is not used, but should be grounded if possible. ● The CTK24BC08 only uses the A2 input hardware addressing. On a single bus system, a total of two 8K devices may be addressed. The A0 and A1 pins are not used, but should be grounded if possible. ● The CTK24BC16 does not use the device address pins, so only one device can be connected to a single bus system. Therefore, the A0, A1, and A2 pins are not used, but should be grounded if possible. Write Protect (WP): The CTK24BC01/02/04/08/16 has a Write Protect pin that provides hardware data protection. When connected to ground, the Write Protect pin allows for normal read/write operations. If the WP pin is connected to VCC, no data can be overwritten. Memory Organization The internal memory organization for the CTK24BC family is arranged differently for each of the densities. The CTK24BC01, for instance, is internally organized as 16 pages of 8 bytes each and requires a 7-bit data word address. The CTK24BC16, on the other hand, is organized as 128 pages of 16 bytes each with an 11-bit data word address. The table below summarizes these differences. Density # of pages Bytes per page Data word address length CTK24BC01 (1K) 16 pages 8 bytes 7 bits CTK24BC02 (2K) 32 pages 8 bytes 8 bits CTK24BC04 (4K) 32 pages 16 bytes 9 bits CTK24BC08 (8K) 64 pages 16 bytes 10 bits CTK24BC16 (16K) 128 pages 16 bytes 11 bits Pin Capacitance Applicable over recommended operating range :TA=25℃, f=1MHz, VCC=+1.8V Symbol Test Condition Max Unit Condition CI/O Input/Output Capacitance (SDA) 8 pF VI/O=0V CIN Input Capacitance (A0, A1,A2, SCL) 6 pF VIN=0V Note : These parameters are characterized and not 100% tested. |
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