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DS2188 Datasheet(PDF) 2 Page - Dallas Semiconductor |
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DS2188 Datasheet(HTML) 2 Page - Dallas Semiconductor |
2 / 11 page DS2188 2 of 11 If the incoming jitter has excursions greater than 120 UIpp, then the crystal is adjusted to track the short- term frequency variations of the incoming signal so that there is no loss of data. This adjustment is accomplished by dividing the 4X crystal by either 3 ½ or 4 ½ instead of 4. When the incoming jitter is greater than 120 UIpp, the BL pin will transition high. When the incoming jitter returns to less than 120 UIpp, the BL pin will return low. The jitter attenuator in the DS2188 can be disabled by tying the DJA pin high. When the jitter attenuator is disabled, the FIFO is bypassed and jitter received at RCLK, RPOS and RNEG is passed through the DS2188 to RRCLK, RRPOS, and RRNEG. In this situation, the BL pin has no significance and XTAL OUT will not be coherent with RRCLK. How to use the DS2188 with Dallas Semiconductor’s other T1 and CEPT line interface parts is illustrated in Figures 3 through 5. Figure 3 illustrates how to use the DS2188 in the receive path along with a DS2187 Receive Line Interface. Figure 4 illustrates how to use the DS2188 in the transmit path with the DS2186 Transmit Line Interface. Also, see DS2188 Application Note, “Operation at Speeds Greater than E1” for additional information. BUFFER DEPTH SELECT The buffer size on the DS2188 can be configured to either 128 or 32 bits via the BDS pin. If BDS is tied low, then the buffer depth will be 128 bits and hence can handle input jitter up to 120 UIpp without losing its full attenuation capabilities as is described above in the Over-view. If BDS is tied high, then the buffer depth is shortened to 32 bits. In this configuration, the DS2188 can handle input jitter up to 28 UIpp without losing its full jitter attenuation capabilities. The user may wish to limit the buffer size to 32 bits in applications where through-put delay is critical or into existing applications that al-ready have 32 bits of buffer space. RESET The buffer on the DS2188 is automatically centered on power-up. The user can recenter the 128-bit (or 32-bit) buffer on demand via the RST pin. The RST pin on the DS2188 is negative-edge triggered. When this pin transitions from high-to-low, the buffer is recentered. The RST pin can be held either high or low during operation of the DS2188; only a negative going signal will initiate a recentering. In most cases, a reset of the DS2188 will corrupt data that is currently passing through the buffer. |
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