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DS2760EA Datasheet(PDF) 6 Page - Dallas Semiconductor |
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DS2760EA Datasheet(HTML) 6 Page - Dallas Semiconductor |
6 / 25 page DS2760 6 of 25 POWER MODES The DS2760 has two power modes: Active and Sleep. While in Active Mode, the DS2760 continually measures current, voltage and temperature to provide data to the host system and to support current accumulation and Li-ion safety monitoring. In Sleep Mode, the DS2760 ceases these activities. The DS2760 enters Sleep Mode when either of the following conditions occurs: • the PMOD bit in the Status Register has been set to 1 and the DQ line is low for longer than 2 seconds (pack disconnection) • the voltage on VIN drops below undervoltage threshold V UV for tUVD (cell depletion) • the pack is disabled through the issuance of a SWAP command (SWEN bit =1) The DS2760 returns to Active Mode when any of the following occurs: • the PMOD bit has been set to 1 and the SWEN bit is set to 0 and the DQ line is pulled high (pack connection) • the PS pin is pulled low (power switch) • the voltage on PLS becomes greater than the voltage on VIN (charger connection) with the SWEN bit set to 0 • the pack is enabled through the issuance of a SWAP command (SWEN bit =1) The DS2760 defaults to Active Mode when power is first applied. LI-ION PROTECTION CIRCUITRY During Active Mode, the DS2760 constantly monitors cell voltage and current to protect the battery from overcharge (overvoltage), overdischarge (undervoltage) and excessive charge and discharge currents (overcurrent, short circuit). Conditions and DS2760 responses are described in the sections below and summarized in Table 2 and Figure 3. LI-ION PROTECTION CONDITIONS AND DS2760 RESPONSES – Table 2 Activation Condition Name Threshold Delay Response Release Threshold Overvoltage VIN > VOV tOVD CC high VIN < VCE Undervoltage VIN < VUV tUVD CC , DC high, Sleep Mode VPLS > VDD (charger connected) Overcurrent, Charge VIS > VOC (1) tOCD CC , DC high VPLS < VDD - VTP (2) Overcurrent, Discharge VIS < -VOC (1) tOCD DC high VPLS > VDD - VTP (3) Short Circuit VSNS > VSC tSCD DC high VPLS > VDD - VTP (3) VIS = VIS1 – VIS2. Logic high = VPLS for CC and VDD for DC . All voltages are with respect to VSS. ISNS references current delivered from pin SNS. (1) for the internal sense resistor configuration, the overcurrent thresholds are expressed in terms of current: ISNS > IOC for charge direction and ISNS < -IOC for discharge direction (2) with test current ITST current flowing from PLS to VSS (pull-down on PLS) (3) with test current ITST current flowing from VDD to PLS (pull-up on PLS) Overvoltage. If the voltage of the cell exceeds overvoltage threshold VOV for a period longer than overvoltage delay tOVD, the DS2760 shuts off the external charge FET and sets the OV flag in the Protection Register. When the cell voltage falls below charge enable threshold VCE, the DS2760 turns the charge FET back on (unless another protection condition prevents it). Discharging remains enabled during overvoltage. |
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