DS1225AB/AD

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READ MODE

The DS1225AB and DS1225AD execute a read cycle whenever WE (Write Enable) is inactive (high) and

CE (Chip Enable) and OE (Output Enable) are active (low). The unique address specified by the 13

stable, providing that CE and OE access times are also satisfied. If CE and OE access times are not

satisfied, then data access must be measured from the later-occurring signal and the limiting parameter is

WRITE MODE

The DS1225AB and DS1225AD execute a write cycle whenever the WE and CE signals are active

(low) after address inputs are stable. The later-occurring falling edge of CE or WE will determine the

start of the write cycle. The write cycle is terminated by the earlier rising edge of CE or WE . All address

inputs must be kept valid throughout the write cycle. WE must return to the high state for a minimum

(high) during write cycles to avoid bus contention. However, if the output drivers are enabled ( CE and

DATA RETENTION MODE

automatically write protect themselves, all inputs become “don’t care,” and all outputs become high-

DS1225AD.

FRESHNESS SEAL

Each DS1225 is shipped from Maxim with the lithium energy source disconnected, guaranteeing full

enabled for battery backup operation.