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MTP3403KN3 Datasheet(PDF) 1 Page - Cystech Electonics Corp. |
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MTP3403KN3 Datasheet(HTML) 1 Page - Cystech Electonics Corp. |
1 / 8 page CYStech Electronics Corp. Spec. No. : C865N3 Issued Date : 2012.08.08 Revised Date : Page No. : 1/8 MTP3403KN3 CYStek Product Specification P-Channel Enhancement Mode MOSFET MTP3403KN3 BVDSS -30V ID -3.3A RDS(ON)@VGS=-10V, ID=-2.5A 63mΩ(typ) RDS(ON)@VGS=-4.5V, ID=-1.35A 100mΩ(typ) RDS(ON)@VGS=-4V, ID=-1.35A 114mΩ(typ) Features • Advanced trench process technology • High density cell design for ultra low on resistance • Low gate charge • Compact and low profile SOT-23 package • Pb-free & Halogen-free package Equivalent Circuit Outline Absolute Maximum Ratings (Ta=25 °C) Parameter Symbol Limits Unit Drain-Source Voltage VDS -30 V Gate-Source Voltage VGS ±20 V Continuous Drain Current @VGS=-10V, TA=25 °C (Note 1) ID -3.3 A Continuous Drain Current @VGS=-10V, TA=70 °C (Note 1) ID -2.6 A Pulsed Drain Current (Note 2) IDM -15 A Maximum Power Dissipation PD 1.25 W Linear Derating Factor 0.01 W/ °C Operating Junction and Storage Temperature Tj, Tstg -55~+150 °C Note : 1. Surface mounted on 1 in² copper pad of FR-4 board, t≤10s; 270 °C/W when mounted on minimum copper pad. 2. Pulse width limited by maximum junction temperature. MTP3403KN3 SOT-23 D S G:Gate G S:Source D:Drain |
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